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7065 Commits

Author SHA1 Message Date
Samuel Pitoiset
63772f3ca5 radv: add MSAA support to ClearColorImage() on compute queue 
Found by inspection.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10070>
 2021-04-08 17:42:15 +00:00
Bas Nieuwenhuizen
580f1ac473 nir: Extract shader_info->cs.shared_size out of union. 
It is valid for all stages, just 0 for most of them. In particular
mesh/task shaders might be using it.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10094>
 2021-04-08 14:39:28 +00:00
Chad Versace
5e6db19168 anv: Remove vkCreateDmaBufINTEL (v4) 
Superceded by VK_EXT_image_drm_format_modifier.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v1)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (v4)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1466>
 2021-04-08 14:15:55 +00:00
Chad Versace
0845cabc72 vulkan: Track dependencies of Python imports 
The meson.build was unaware of transitive dependencies introduced by
Python imports.

Android still needs fixing. But I did not update the Android files lest
I break the build.

Ideally, we would fix this by using a Python runner that generates
a depfile, similar to how meson creates depfiles for C files by passing
flags -MD -MQ -MF to gcc. But this patch gets the job done, without
stalling on the ideal general solution, by manually tracking the Python
imports in new 'foo_depend_files' variables.

CC: mesa-stable@lists.freedesktop.org
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1466>
 2021-04-08 14:15:54 +00:00
Rhys Perry
961361cdc9 aco: ensure loops nested in a WQM loop are in WQM 
Fixes a potential empty exec mask in this situation:
enter_wqm()
loop {
   ... wqm code ...
   enter_exact()
   loop {
      ... no wqm code ...
   }
}

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: f0074a6f05 ("aco: do not flag all blocks WQM to ensure we enter all nested loops in WQM")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4546
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10075>
 2021-04-08 09:56:25 +00:00
Samuel Pitoiset
9a3d496398 radv: make sure FMASK decompress and FCE are performed on gfx queue 
To catch possible transition failures.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10056>
 2021-04-08 08:21:40 +02:00
Samuel Pitoiset
da166f648f radv: enable DCC for concurrent images on GFX10 
The driver now supports DCC stores on GFX10 that means that we can
keep DCC compressed on all layouts/queues.

This should help games which use aync compute or which declare
all images as concurrent like Youngblood.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9850>
 2021-04-07 18:33:34 +00:00
Samuel Pitoiset
37d48de83e radv: simplify a check when enabling DCC for concurrent images 
If the image is marked as concurrent, each element of
pQueueFamilyIndices must be unique, so queue_family_mask is
different than 1.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9850>
 2021-04-07 18:33:34 +00:00
Samuel Pitoiset
d4db68b338 radv: enable DCC stores with MSAA 4x/8x on GFX10+ 
Should work now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10052>
 2021-04-07 17:13:51 +00:00
Samuel Pitoiset
f280367a27 radv: perform MSAA color decompression for storage images with DCC 
For MSAA storage images with DCC, we also need to perform a MSAA
color decompression.

Fixes dEQP-VK.pipeline.multisample.storage_image.* if DCC stores
is enabled.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9854>
 2021-04-07 15:35:07 +00:00
Rhys Perry
835c5b7ebf aco: fix integer tg4 workaround with unnormalized coordinates 
Same as LLVM from 2abf62d348.

fossil-db (GFX8):
Totals from 15 (0.01% of 147787) affected shaders:
VGPRs: 744 -> 748 (+0.54%)
CodeSize: 100472 -> 100732 (+0.26%)
Instrs: 19995 -> 20059 (+0.32%)
Latency: 1001530 -> 1001859 (+0.03%)
InvThroughput: 378508 -> 378747 (+0.06%)
SClause: 676 -> 675 (-0.15%)
Copies: 1655 -> 1654 (-0.06%)
PreSGPRs: 735 -> 742 (+0.95%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10053>
 2021-04-07 15:21:51 +00:00
Simon Ser
7499f84956 radv: fix format feature reporting for modifiers 
The format_feature_flags bitfield is derived from the modifier if
the tiling is set to VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT.
However radv will reset the tiling to either LINEAR or OPTIMAL if
the caller supplied a VkPhysicalDeviceImageDrmFormatModifierInfoEXT
in the chain.

Stop resetting the tiling, so that we can compute the correct feature
flags.

Signed-off-by: Simon Ser <contact@emersion.fr>
Fixes: 6c83e3ea98 ("radv: Add format modifier format queries.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9978>
 2021-04-06 09:20:26 +00:00
Bas Nieuwenhuizen
57511d1458 radv: Flush caches for shader read operations. 
As part of the fmask expand we very much read from the images as
well ...

Fixes: 8f8d72af55 ("radv: Use access helpers for flushing with meta operations.")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10042>
 2021-04-05 18:34:53 +00:00
Samuel Pitoiset
8b80e8f832 radv: init CMASK/FMASK/DCC in parallel 
To remove bubbles during layout transitions from UNDEFINED, especially
with MSAA because we might have all.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10004>
 2021-04-05 16:21:12 +00:00
Samuel Pitoiset
14b312b223 radv: handle implicit subpass dependencies per attachment 
From the Vulkan spec 1.2.172:

"If there is no subpass dependency from VK_SUBPASS_EXTERNAL to the
 first subpass that uses an attachment, then an implicit subpass
 dependency exists from VK_SUBPASS_EXTERNAL to the first subpass
 it is used in."

"Similarly, if there is no subpass dependency from the last subpass
 that uses an attachment to VK_SUBPASS_EXTERNAL, then an implicit
 subpass dependency exists from the last subpass it is used in to
 VK_SUBPASS_EXTERNAL."

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9714>
 2021-04-05 11:42:51 +00:00
Samuel Pitoiset
2ded998a57 radv: allow DCC for storage images on GFX10.3 with RADV_PERFTEST=dccstores 
It's not enabled by default because it requires performance testing.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9919>
 2021-04-05 08:54:55 +00:00
Samuel Pitoiset
65bca137bd aco: implement a workaround for the image load DCC hw bug on GFX10.3 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9919>
 2021-04-05 08:54:55 +00:00
Samuel Pitoiset
3dfb453626 aco: fix get_sampler_desc() for image loads 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9919>
 2021-04-05 08:54:55 +00:00
Samuel Pitoiset
ec611beae2 ac: add ac_gpu_info::has_image_load_dcc_bug 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9919>
 2021-04-05 08:54:55 +00:00
Samuel Pitoiset
9745a6f9a3 radv: clean up fence syncobj code 
Since RADV requires DRM 3.35+, this code can be simplified.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9953>
 2021-04-05 08:04:51 +00:00
Samuel Pitoiset
4b0fc025f3 radv: try to keep HTILE compressed with DEPTH_STENCIL_READ_ONLY_OPTIMAL 
From the Vulkan spec:
    "VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL specifies a
     layout for both the depth and stencil aspects of a depth/stencil
     format image allowing read only access as a depth/stencil
     attachment or in shaders as a sampled image, combined
     image/sampler, or input attachment. It is equivalent to
     VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_OPTIMAL and
     VK_IMAGE_LAYOUT_STENCIL_READ_ONLY_OPTIMAL."

So, it should be safe to keep HTILE compressed if the depth/stencil
image isn't going to be sampled. We could probably extend this
to separate depth/stencil layout but that seems a bit more
complicated.

This gives a huge boost to the deferredmultisampling Vulkan demo.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10008>
 2021-04-05 07:23:50 +00:00
Samuel Pitoiset
8fa7aa16ce radv: change RADV_FORCE_FAMILY to use family name instead of LLVM processor name 
gfx1030 doesn't allow us to specify e.g. dimgrey.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9974>
 2021-04-05 06:53:55 +00:00
Samuel Pitoiset
11c1027730 ac: add ac_get_family_name() helper 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9974>
 2021-04-05 06:53:55 +00:00
Alyssa Rosenzweig
06ebbde630 vulkan: Deduplicate mesa stage conversion 
Across every driver...

v2: Add casts to appease -fpermissive used on CI.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9477>
 2021-04-03 17:34:39 +00:00
Marek Olšák
5e4d31f646 ac/surface/tests: move shareable code into ac_surface_test_common.h 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9795>
 2021-04-02 12:05:00 +00:00
Marek Olšák
933df67296 ac/surface: add CMASK info for level 0 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9795>
 2021-04-02 12:05:00 +00:00
Marek Olšák
b3e7c77f13 amd: fix parsing the last dword of DMA_DATA packets 
It was parsing it as SQ_WAVE_GPR_ALLOC instead of COMMAND.
Change the offset to an odd number to work around it.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9795>
 2021-04-02 12:05:00 +00:00
Marek Olšák
ac78b12e23 ac/llvm: don't set unsupported xnack options to fix LLVM crashes on gfx6-8 
LLVM prints an error if xnack is unsupported and it uses a global stream
object that is not thread-safe. Since Mesa uses multiple threads to compile
shaders, there is a small chance that it will crash.

Just don't set any xnack options to use LLVM defaults.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4439

Cc: 20.3 21.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9795>
 2021-04-02 12:05:00 +00:00
Samuel Pitoiset
57916fbdcd radv: use COLOR_ATTACHMENT_OPTIMAL for fast clear/hw resolve operations 
This should be equivalent without needed to force enable FMASK for
some specific internal pipelines.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9940>
 2021-04-02 08:36:19 +02:00
Samuel Pitoiset
fc2186d302 radv: do not force enable FMASK during MSAA blits 
This is no longer needed since FMASK is also compressed for
transfer dst operations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9940>
 2021-04-02 08:36:16 +02:00
Samuel Pitoiset
6dbf975cb9 radv: cleanup FMASK expand transitions 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9990>
 2021-04-02 06:34:45 +00:00
Samuel Pitoiset
87c8764448 radv: compress FMASK for all layouts except GENERAL 
The COMPRESSION bit is FMASK and this is much faster! Should
speedup transfer dst operations with MSAA images considerably.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9990>
 2021-04-02 06:34:45 +00:00
Samuel Pitoiset
4fc13a7321 radv: use a sampled image descriptor for reads for the MSAA color decompress 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9915>
 2021-04-01 13:57:02 +00:00
Samuel Pitoiset
5c8a7fa631 radv: only set WRITE_COMPRESS_ENABLE for storage image descriptors 
This will allow us to reduce the number of situations where the
compiler workaround is needed on GFX10.3.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9924>
 2021-03-31 17:33:16 +02:00
Mike Blumenkrantz
71e39c79fd radv: don't reset vertex state params on pipeline bind if reg layout matches 
this is unnecessary since the locations will match

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8788>
 2021-03-31 13:54:24 +00:00
Mike Blumenkrantz
df1c45890d radv: don't emit baseinstance and drawid if neither is used 
indirect draw dispatch contributed by Samuel Pitoiset <samuel.pitoiset@gmail.com>

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8788>
 2021-03-31 13:54:24 +00:00
Mike Blumenkrantz
d67c1bc74d radv: reorder vertex shader params 
put baseinstance last since it's the least updated

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8788>
 2021-03-31 13:54:24 +00:00
Mike Blumenkrantz
da7ffc3b97 radv: make vertex param sgpr count more explicit 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8788>
 2021-03-31 13:54:24 +00:00
Mike Blumenkrantz
4e0a3c2527 radv: break out vertex shader param emission into separate function 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8788>
 2021-03-31 13:54:24 +00:00
Mike Blumenkrantz
0a8b091922 radv: track whether baseinstance is used on the pipeline struct 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8788>
 2021-03-31 13:54:24 +00:00
Mike Blumenkrantz
b1b867033e radv: track whether drawid is used on the pipeline struct 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8788>
 2021-03-31 13:54:24 +00:00
Mike Blumenkrantz
eed676c42a radv: set gfx pipeline vtx_emit_num to the number of sgprs 
this should always match what we want to be doing

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8788>
 2021-03-31 13:54:24 +00:00
Mike Blumenkrantz
65626eba29 radv: simplify vs draw param counting during setup 
we can just reuse the existing function for this

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8788>
 2021-03-31 13:54:24 +00:00
Mike Blumenkrantz
1ffa615444 radv: track whether gl_BaseInstance is used 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8788>
 2021-03-31 13:54:24 +00:00
Mike Blumenkrantz
75a2476dfb radv: refactor draw dispatch 
this breaks up the monolithic draw path used for all draw calls into
pre/post functions to handle general setup and a couple helper functions
to more directly handle different draw modes in a way that's both more readable
and, potentially, more optimizable

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8788>
 2021-03-31 13:54:24 +00:00
Mike Blumenkrantz
d0ef28d85e radv: stop zeroing radv_draw_info during draw 
this is a big struct, and there's only a couple extra members that need
to be initialized to hit the right codepaths

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8788>
 2021-03-31 13:54:24 +00:00
Tony Wasserka
e5c869c2ee ci: skip pipeline_barrier tests that currently crash on RADV 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4511
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9893>
 2021-03-30 16:50:49 +00:00
Samuel Pitoiset
688dada1a8 radv: do not fixup DCC after compute color resolves if DCC stores enabled 
With compressed DCC writes supported, the image should still be
compressed after resolving using the compute path.

Fixes various dEQP-VK.api.copy_and_blit.core.resolve_image.*
failures with RADV_DEBUG=forcecompress on GFX10.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9908>
 2021-03-30 10:01:12 +00:00
Bas Nieuwenhuizen
83c92a48b7 vulkan: Fix descriptor set creation with zero bindings. 
MAX2(count * struct size, 1) results in 1 for count=0, not the size of a struct.

Since this MAX only seems to exist so we can keep using NULL for error reporting,
just refactor to return a VkResult.

Fixes: ad241b15a9 ("vk: consolidate dynamic descriptor binding sorting")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4522
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9880>
 2021-03-29 23:32:50 +00:00
Samuel Pitoiset
fa712d9e17 ac/surface: do not allocate FMASK or CMASK for stencil-only surfaces on GFX9+ 
FMASK/CMASK make no sense with depth/stencil or stencil-only surfaces.
gfx9_compute_miptree() was called twice for stencil-only surfaces,
and the first call was allocating FMASK/CMASK.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9612>
 2021-03-29 20:18:29 +00:00