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8061 Commits

Author SHA1 Message Date
Lionel Landwerlin
6d063ec900 anv: remove device features handling now in runtime 
v2: Keep VkPhysicalDeviceBufferDeviceAddressFeaturesEXT (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17272>
 2022-06-29 10:47:36 +00:00
Lionel Landwerlin
3e247cd05f anv: disable non uniform indexing of UBOs 
The feature we wanted to enable in 710393b3aa was
descriptorBindingUniformBufferUpdateAfterBind.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 710393b3aa ("anv: enable UBO indexing")
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17200>
 2022-06-29 05:57:27 +00:00
David Heidelberg
6c4cc0abc6 ci: traces: switch to brotli compressed traces 
virgl: Also drop old pre-trim glxgears trace (cached).

Acked-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Emma Anholt <emma@anholt.net>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17280>
 2022-06-29 00:58:28 +00:00
Boris Brezillon
17dff363ce anv: Use vk_pipeline_hash_shader_stage() 
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17186>
 2022-06-28 09:07:32 +00:00
Lionel Landwerlin
9d7d1c0637 intel/clc: enable fp16 & subgroups for GRL 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17253>
 2022-06-27 15:31:49 +00:00
Marcin Ślusarz
b6ba24cd62 anv: disable injection of primitive shading rate for mesh 
It's not needed and causes issues for mesh code (it doesn't
mark the output as per-primitive, which confuses brw_compute_mue_map)

Fixes many tests matching:
dEQP-VK.fragment_shading_rate.dynamic_rendering.*.ms

Fixes: 1542ab70eb ("anv: handle primitive shading rate for mesh")
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16196>
 2022-06-27 14:14:41 +00:00
Marcin Ślusarz
42b551fe7f intel/compiler: adjust task payload offsets as late as possible 
Otherwise passes which expect offsets to be in bytes (like
brw_nir_lower_mem_access_bit_sizes, called from brw_postprocess_nir)
may produce incorrect results.

Fixes 64-bit load/stores in task/mesh shaders.

Fixes: c36ae42e4c ("intel/compiler: Use nir_var_mem_task_payload")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16196>
 2022-06-27 14:14:41 +00:00
Marcin Ślusarz
3dc6a98d78 intel/common: allocate space for at least one task urb 
Fixes: c93cbc77f7 ("intel/common: Add helper for URB allocation in Mesh pipeline")
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16196>
 2022-06-27 14:14:41 +00:00
Sviatoslav Peleshko
3f6edbc725 intel/blorp: Dirty depth bounds dynamic state bits after blorp 
Blorp emits its own 3DSTATE_DEPTH_BOUNDS, so we'll have to re-emit the
expected state after that.

Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Fixes: 56ef501e3a ("blorp: disable depth bounds")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17205>
 2022-06-27 11:11:30 +00:00
Sviatoslav Peleshko
b6bb7f8998 anv: Dirty all dynamic state bits when creating command buffer state 
This makes sure that we'll handle situations when the new state has
the same value as the default one, so we won't dirty some bits, and
consequently will not emit necessary commands (e.g. 3DSTATE_DEPTH_BOUNDS).

Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Fixes: 48229d11 ("anv: don't emit 3DSTATE_DEPTH_BOUNDS in pipeline batch")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6722
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17205>
 2022-06-27 11:11:30 +00:00
Marcin Ślusarz
f4386b81e6 intel: fix typos found by codespell 
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17191>
 2022-06-27 10:20:55 +00:00
Lionel Landwerlin
68e5265fa1 anv: silence border color swizzle debug message 
MESA-INTEL: debug: gfx11_CreateSampler: ignored VkStructureType 1000411001

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17245>
 2022-06-27 09:01:00 +00:00
Jason Ekstrand
6216c59dbb vulkan/render_pass: Use a special layout for self-dependencies 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16953>
 2022-06-24 22:37:53 +00:00
Jason Ekstrand
f10012a2b2 anv: Use CmdBeginRendering for resumes in BeginCommandBuffer when possible 
This lets us avoid the code duplication between BeginRendering and
BeginCommandBuffer and also lets us stop crawling core render pass
structs directly and instead focus on dynamic rendering concepts.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16953>
 2022-06-24 22:37:53 +00:00
Sviatoslav Peleshko
318473eaf1 intel/blorp/gen6: Set BLEND_STATEChange only if emitting the blend state 
This change is pretty straightforward: if set this field when we don't emit
the blend state, then the garbage at offset=0 will be set as a blend state,
and this will cause artifacts until the proper blend state will be given.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6544
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6232

Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17132>
 2022-06-24 10:06:34 +00:00
Lionel Landwerlin
eac5a2fdfa anv: make apply_pipeline_layout/compute_push_layout visible to NIR debug 
Useful for debug.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17209>
 2022-06-24 07:12:18 +00:00
Lionel Landwerlin
9b11618dfa anv: disable perf queries on non RCS engines 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17015>
 2022-06-23 22:47:37 +00:00
Lionel Landwerlin
5d05ffa465 anv: limit RT writes to number of color outputs 
Not doing so crates skews occlusion queries. Fixes Zink's piglit
occlusion_query tests.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: a4f502de32 ("anv: fix VK_DYNAMIC_STATE_COLOR_WRITE_ENABLE_EXT state")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6205
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15740>
 2022-06-22 21:45:52 +00:00
Marcin Ślusarz
f871aa10a1 intel/compiler: assert that base is 0 for [load|store]_shared intrins 
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17143>
 2022-06-22 10:32:13 +00:00
Jordan Justen
a7127fbc4c intel/tools: Print memory info in intel_dev_info 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17075>
 2022-06-22 00:30:49 +00:00
Jordan Justen
1505f94397 anv: Use memory info from devinfo 
Rework:
 * Jordan: Drop regions.valid (Lionel implemented a fallback)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17075>
 2022-06-22 00:30:49 +00:00
Lionel Landwerlin
4289c9ec13 intel/dev: add a fallback when memory regions are not available 
We have this in Anv and it could be reused in Iris for integrated
memory system.

Rework:
 * Jordan: Drop regions.valid (Lionel implemented a fallback)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17075>
 2022-06-22 00:30:49 +00:00
Lionel Landwerlin
4e727297e8 intel/dev: add a helper to update memory info 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17075>
 2022-06-22 00:30:49 +00:00
Jordan Justen
4aecfbf0f4 intel/dev: Add devinfo::mem to store i915 regions information 
Reworks:
 * Lionel: Change check on memory region valid to vram size
 * Jordan: Drop regions.valid (Lionel implemented a fallback)
 * Jordan: Rename devinfo::regions to devinfo::mem.
 * Jordan: Add devinfo::mem::use_class_instance
 * Add mesa_logw for lmem requiring regions. (s-b Lionel)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17075>
 2022-06-22 00:30:49 +00:00
Lionel Landwerlin
4f10eddf77 anv: fix index buffer emission 
In the following case :

  vkCmdBindPipeline(compute_pipeline);
  vkCmdDispatch(...);
  vkCmdBindPipeline(graphics_pipeline);
  vkCmdBindIndexBuffer(buffer)
  vkCmdDraw(...);

We're emitting the 3DSTATE_INDEX_BUFFER instruction while the HW is
still in GPGPU mode, because we're dealing the pipeline selection to
vkCmdDraw().

Found while debugging Age Of Empire 4, HW is hung on
3DSTATE_INDEX_BUFFER instruction.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17153>
 2022-06-21 16:24:10 +00:00
Marcin Ślusarz
008163f382 intel/compiler: vectorize task payload loads/stores 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17000>
 2022-06-20 17:38:20 +00:00
Mykhailo Skorokhodov
50b21fb6e4 anv: Use sampleLocationsEnable for sample locations 
The spec says: "sampleLocationsEnable controls whether custom sample
locations are used. If sampleLocationsEnable is VK_FALSE, the default
sample locations are used and the values specified in
sampleLocationsInfo are ignored."

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6675
Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17134>
 2022-06-20 11:58:09 +00:00
Marcin Ślusarz
4e4ef72aac intel/dev: fixup max_cs_workgroup_threads after hwconfig is read 
Without it we get max value from gfx12 on gfx>12.

Fixes: d9ff9ea9c3 ("intel/dev: Read hwconfig from i915")

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17063>
 2022-06-20 07:43:43 +00:00
Jason Ekstrand
7a8ec23c9d anv: Properly clamp attachment layer counts 
Vulkan requires that the acutal layer count come from
VkRenderingInfo::layerCount or VkFramebufferCreateInfo::layers rather
than from the image view itself.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17060>
 2022-06-17 18:33:58 -05:00
Ian Romanick
676acfe956 intel/fs: Add missing synchronization for WaW dependency 
v2: Do the synchronization in the correct place.  Noticed by Curro.

Fixes: b5fa43952a ("intel/fs: Better handle constant sources of FS_OPCODE_PACK_HALF_2x16_SPLIT")
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Tested-by: Felix DeGrood <felix.j.degrood@intel.com> [v1]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17037>
 2022-06-17 17:05:43 +00:00
Lionel Landwerlin
03e543a422 intel/validator: validate dst/src types against devinfo support 
v2: deal with src3_a1/src3_a16 instruction types (Curro)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16985>
 2022-06-17 15:43:05 +00:00
David Heidelberg
2df90aa562 ci/iris: disable Blender Diorama trace (incompatible with perf. traces) 
Sadly, Blender Diorama trace causes crash for our performance tracing as we
use it right now.

Let's disable it for now, until we figure out what's wrong.

Reported in: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6676

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17083>
 2022-06-16 19:07:15 +00:00
Iván Briano
4666ef720e anv: do not get rid of empty/useless fragment shaders 
This was an optimization done a while ago that doesn't seem to be having
much of an impact anymore, and on the other hand, causes all sorts of
breakage with queries, as many of our HW counters don't get incremented
when rasterization is disabled.

This fixes a bunch of issues Zink has with ANV, but more importantly, it
fixes upcoming CTS tests:
dEQP-VK.transform_feedback.primitives_generated_query.*.empty_frag.*
dEQP-VK.transform_feedback.primitives_generated_query.*.no_attachment.*
dEQP-VK.transform_feedback.primitives_generated_query.*.color_write_disable_*

Cc: mesa-stable

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17038>
 2022-06-16 14:42:12 +00:00
Mark Janes
a1a5f6430a intel: provide a callback to clean up after intel_measure_gather 
The caller may have passed ownership of intel_measure_batch structures
to intel_measure until they are ready to be gathered.  The caller
needs a notification when rendering is complete and snapshots have
been processed, so it can free the resources that measure the batch.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16571>
 2022-06-16 02:58:08 +00:00
Mark Janes
34a130fedf anv: fix performance bug in INTEL_MEASURE 
Re-allocating the buffer object for snapshots carries a heavy penalty
at run-time.  When resetting a command buffer, the buffer object that
is allocated for snapshots may be re-used directly on subsequent
renders.

Stale snapshot data will persist in the buffer object.  To verify that
rendering is complete, zero the final timestamp value and check that
it has been written before gathering data.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16571>
 2022-06-16 02:58:08 +00:00
Mark Janes
c4c096e66e intel: relax assertion in INTEL_MEASURE 
It is possible that a secondary command buffer was submitted with no
renders in it.  For that case, no timestamp will be collected.  Only
verify that timestamps if the index is nonzero.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16571>
 2022-06-16 02:58:08 +00:00
Mark Janes
3c53c6b247 intel: parse intel_measure environment without side effects 
If an application links agaist both iris and anv, they will clash when
parsing the INTEL_MEASURE environment variable.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16571>
 2022-06-16 02:58:08 +00:00
Emma Anholt
979f213110 ci/iris: Disable blender-demo-cube_diorama on APL. 
It has timed out on 3 jobs today.

Fixes: 96f0944a69 ("ci/panfrost: add Blender, Warzone2100, Freedoom and Unvanquished traces")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17041>
 2022-06-15 23:28:23 +00:00
Yonggang Luo
0f3064ee44 intel: using C++11 keyword thread_local 
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15087>
 2022-06-15 17:37:16 +00:00
Jordan Justen
81d6ae31d6 anv, iris: Enable compute engine with INTEL_COMPUTE_CLASS=1 
If this environment variable is set, then a detected compute engine
will be used as described in docs/envvars.rst.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14395>
 2022-06-15 08:58:20 +00:00
Jordan Justen
0c90c695f5 anv, iris: Add support for I915_ENGINE_CLASS_COMPUTE 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14395>
 2022-06-15 08:58:20 +00:00
Jordan Justen
b27720f2a1 anv: Move STATE_BASE_ADDRESS programming into init_common_queue_state() 
This is now needed following Ken's 8831cb38aa.

Ref: 8831cb38aa ("anv: Stop updating STATE_BASE_ADDRESS on XeHP")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14395>
 2022-06-15 08:58:20 +00:00
Jordan Justen
09d12e6727 anv: Add support for I915_ENGINE_CLASS_COMPUTE in init_device_state() 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14395>
 2022-06-15 08:58:20 +00:00
Jordan Justen
60e29fc7c5 intel/gem: Add support for I915_ENGINE_CLASS_COMPUTE 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14395>
 2022-06-15 08:58:20 +00:00
Lionel Landwerlin
b0cd7bc8c1 anv: don't expose EXT_border_color_swizzle on gfx7 
This requires EXT_custom_border_color which isn't supported on gfx7.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: fbcf65bfea ("anv: VK_EXT_border_color_swizzle")
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17025>
 2022-06-15 07:30:52 +00:00
David Heidelberg
f58168850f ci/iris: add Blender, Warzone2100, Freedoom and Unvanquished traces 
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16909>
 2022-06-14 11:52:45 +00:00
Mike Blumenkrantz
fbcf65bfea anv: VK_EXT_border_color_swizzle 
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16992>
 2022-06-14 01:52:50 +00:00
Jason Ekstrand
ce60195ecd anv: Use NIR_PASS(_, ...) 
I don't know when this was added but it's really neat and we should use
it instead of NIR_PASS_V since NIR_DEBUG=print and a few validation
things will work better.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17014>
 2022-06-13 22:31:25 +00:00
Jason Ekstrand
844a70f439 intel/compiler: Use NIR_PASS(_, ...) 
I don't know when this was added but it's really neat and we should use
it instead of NIR_PASS_V since NIR_DEBUG=print and a few validation
things will work better.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17014>
 2022-06-13 22:31:25 +00:00
Francisco Jerez
96e7e92f0d intel/fs/xehp+: Emit scheduling fence for all NIR barriers on platforms with LSC. 
Tested-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15743>
 2022-06-12 12:56:47 +03:00