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189 Commits

Author SHA1 Message Date
James Park 4bd18e772a amd/llvm,aco: Replace VLA with alloca 
MSVC will never support VLA, so use alloca instead.

Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7157>
 2020-11-03 07:44:02 +00:00
Daniel Schürmann 121fa017e1 ac/nir: implement nir_op_[un]pack_64_4x16 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6527>
 2020-10-28 10:14:26 +00:00
Rhys Perry bddaa9339c ac/nir: remove bindless image atomic format check 
PIPE_FORMAT_* is supposed to be used and a similar check will probably be
added to nir_validate soon anyway.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7275>
 2020-10-26 11:58:15 +00:00
Samuel Pitoiset 6694b4276b ac/nir: abort when an unknown intrinsic is reached 
This would have catched this NIR GS lowering regression earlier.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7127>
 2020-10-22 15:44:23 +02:00
Samuel Pitoiset fa490cb6ac ac/nir: ignore set_vertex_and_primitive_count intrinsic 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7269>
 2020-10-22 15:27:31 +02:00
Samuel Pitoiset eacdad7ea0 ac/nir: do not sign-extend the result of texop_samples_identical 
The return value should be a NIR 1-bit bool.

This fixes a regression with piglit
ext_shader_samples_identical-simple-fs 2 on RadeonSI.

Fixes: e690a1b78b ("ac/llvm: don't lower bool to int32, switch to native i1 bool")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7236>
 2020-10-21 13:06:40 +02:00
Bas Nieuwenhuizen bf955d5f0a amd/llvm: Add VK_KHR_shader_terminate_invocation support. 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7226>
 2020-10-20 22:53:08 +00:00
Samuel Pitoiset 9aa89b36fc ac/nir: handle non-const offset with txf/txf_ms 
It might be a vec2. If it's a constant, LLVM will fold it.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7077>
 2020-10-20 10:21:39 +00:00
Marek Olšák e690a1b78b ac/llvm: don't lower bool to int32, switch to native i1 bool 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7077>
 2020-10-20 10:21:39 +00:00
Samuel Pitoiset b3529e56b5 ac/nir: implement missing nir_op_pack_half_2x16_split 
RADV now lowers lower_pack_half_2x16.

Fixes: 2f125908b3 ("radv,aco: lower_pack_half_2x16")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7187>
 2020-10-19 08:41:31 +02:00
James Park 28d02b9d3e ac,amd/llvm,radv: Initialize structs with {0} 
Necessary to compile with MSVC.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7123>
 2020-10-14 12:15:23 +00:00
Samuel Pitoiset 5000c344cc ac/llvm: move AC_FETCH_FORMAT to non-LLVM code 
While we are it, give it a name.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7065>
 2020-10-12 13:13:40 +00:00
Samuel Pitoiset 6387341cce ac/nir: pass the variable location to store_tcs_outputs 
It's actually simpler for the backend to know the variable location.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7022>
 2020-10-12 09:23:25 +02:00
Samuel Pitoiset 8f8ee5b95b ac,radv,radeonsi: stop multiplying driver_location by 4 
It's no longer needed to do that.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7010>
 2020-10-12 08:34:02 +02:00
Samuel Pitoiset 0a90dab6b4 radv/llvm: stop assigning driver_location in NIR->LLVM 
It's already assigned just after NIR linking shaders.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7010>
 2020-10-12 08:33:57 +02:00
Samuel Pitoiset 31a0574b96 ac/nir: implement nir_op_fsat 
With fmed3 if available, otherwise fallback to fmin/fmax.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6932>
 2020-10-08 12:38:04 +00:00
Samuel Pitoiset f984654da8 ac/nir,radv: fix invalid IR when loading inline uniform blocks 
Fixes dEQP-VK.binding_model.descriptorset_random.* and
dEQP-VK.binding_model.descriptor_copy.*.

Fixes: 05b6612b4e ("radv: do not lower UBO/SSBO access to offsets")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6977>
 2020-10-05 14:06:16 +02:00
Samuel Pitoiset 9896337d1b ac,radv,radeonsi: remove unused parameters in the shader ABI IO 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6931>
 2020-10-05 13:14:33 +02:00
Samuel Pitoiset e3296e05ae ac/nir: remove dead shader IO code 
RADV/LLVM and RadeonSI now lower IO.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6931>
 2020-10-05 13:14:29 +02:00
Samuel Pitoiset 456f63e0ba ac/nir: remove dead global load/store/atomic derefs code 
RADV/LLVM now lowers global operations and RadeonSI doesn't use that.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6931>
 2020-10-05 13:14:25 +02:00
Samuel Pitoiset f11d4f3127 ac/llvm: implement nir_op_unpack_half_2x16_split_{x,y} 
nir_unpack_half_2x16_split_{x,y}_flush_to_zero don't have to be
implemented because RADV/LLVM doesn't allow flushing denorms
for 16-bit floating point.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6937>
 2020-10-05 12:42:40 +02:00
Samuel Pitoiset 1ea48c1f57 ac/nir: remove dead load/store deref code for temporary variables 
They should have been lowered before reaching the backend.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6984>
 2020-10-05 08:33:00 +02:00
Samuel Pitoiset 7a8f5eab71 ac/llvm: adjust dmask when image stores are shrinked using the format 
It looks like GFX10 doesn't care about dmask if it's greater than
the number of components stored but it matters on GFX8-9 (I haven't
checked older gens).

Fixes: 1b4d968106 ("ac/llvm: fix invalid IR if image stores are shrinked using the format")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6982>
 2020-10-05 08:13:24 +02:00
Samuel Pitoiset b00a023f1e ac/nir: fix nir_intrinsic_shared_atomic_fadd 
This was completely broken.

Fixes dEQP-VK.glsl.atomic_operations.add_float32_compute_shared.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6936>
 2020-10-01 06:38:42 +00:00
Samuel Pitoiset 8227b08c08 ac/llvm: fix invalid use of unreachable in ac_build_atomic_rmw() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6936>
 2020-10-01 06:38:42 +00:00
Samuel Pitoiset 1b4d968106 ac/llvm: fix invalid IR if image stores are shrinked using the format 
It's not always v4f32 (or v4f16 for 16-bit) when image stores are
shrinked using the format.

This fixes a ton of crashes with RADV_DEBUG=checkir,llvm.

Fixes: e4d75c22be ("nir/opt_shrink_vectors: shrink image stores using the format")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6882>
 2020-09-29 07:40:42 +00:00
Samuel Pitoiset 10b73e2b52 ac/nir: implement nir_intrinsic_global_atomic_* 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5316>
 2020-09-29 07:24:35 +00:00
Samuel Pitoiset 82cf607557 ac/nir: implement nir_intrinsic_{load,store}_global 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5316>
 2020-09-29 07:24:35 +00:00
Marek Olšák f1284505f0 radeonsi: fuse or lower ffma optimally on all chips 
LLVM is going to support the legacy instructions soon.

This change switches FMA to MAD for gfx10.

54793 shaders in 33659 tests
Totals:
SGPRS: 2632554 -> 2629570 (-0.11 %)
VGPRS: 1536364 -> 1535312 (-0.07 %)
Spilled SGPRs: 3602 -> 3562 (-1.11 %)
Spilled VGPRs: 44 -> 40 (-9.09 %)
Private memory VGPRs: 256 -> 256 (0.00 %)
Scratch size: 312 -> 308 (-1.28 %) dwords per thread
Code Size: 55422660 -> 55345408 (-0.14 %) bytes
Max Waves: 963983 -> 964200 (0.02 %)

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6756>
 2020-09-24 12:29:11 +00:00
Marek Olšák 283686ad67 amd: add VanGogh support 
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6820>
 2020-09-22 16:50:07 +00:00
Marek Olšák d7495bd123 amd: add Dimgrey Cavefish support 
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6820>
 2020-09-22 16:50:07 +00:00
Jason Ekstrand 9750164c09 nir: Rename get_buffer_size to get_ssbo_size 
This makes it explicit that this intrinsic is only for SSBOs.  For the
v3dv driver, we'll be adding a get_ubo_size intrinsic and we want to be
able to distinguish between the two.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6812>
 2020-09-22 13:34:12 +00:00
Marek Olšák 98a52fecda radeonsi: implement 16-bit FS color outputs 
This removes type conversions from 16 bits to 32 bits in the main function
and then back to 16 bits in the epilog.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6622>
 2020-09-22 02:44:53 +00:00
Daniel Schürmann 581a3516dc ac/nir: implement nir_op_[un]pack_[64/32]_* 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6622>
 2020-09-22 02:44:53 +00:00
Marek Olšák 758ab39d25 radeonsi: clean up ffma handling 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6596>
 2020-09-16 02:39:02 +00:00
Vinson Lee 50f1cd4076 ac/llvm: Fix nonportable sizeof. 
Fix defect reported by Coverity.

Sizeof not portable (SIZEOF_MISMATCH)
suspicious_sizeof: Passing argument vec_size * 8UL /* sizeof
(LLVMValueRef *) */ to function __builtin_alloca and then casting
the return value to LLVMValueRef * is suspicious. In this
particular case sizeof (LLVMValueRef *) happens to be equal to
sizeof (LLVMValueRef), but this is not a portable assumption.

Fixes: ca74603b4f ("ac/llvm: add better code for isign")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6682>
 2020-09-14 15:25:45 -07:00
Marek Olšák cdd498bbe8 nir: add new mediump opcodes f2[ui]mp, i2fmp, u2fmp 
Algebraic optimizations will select them.

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6283>
 2020-09-10 23:35:13 +00:00
Marek Olšák 3d3df8dbff nir: remove redundant opcode u2ump 
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6283>
 2020-09-10 23:35:13 +00:00
Marek Olšák 9fc9615274 ac,radeonsi: lower 64-bit IO to 32 bits and remove all dead code 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6623>
 2020-09-08 17:11:07 +00:00
Pierre-Eric Pelloux-Prayer 82d2d73e03 amd/llvm: switch to 3-spaces style 
Follow-up of !4319 using the same clang-format config.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5310>
 2020-09-07 10:00:20 +02:00
Marek Olšák e8d55e6db3 ac/llvm: fix b2f for v2f16 
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6284>
 2020-09-06 14:36:21 +00:00
Marek Olšák d9a77f9ca3 ac/llvm: add better code for fsign 
There are 2 improvements:
- better code for 16, 32, and 64 bits
- vector support for 16 and 32 bits

Totals:
SGPRS: 2639738 -> 2625882 (-0.52 %)
VGPRS: 1534120 -> 1533916 (-0.01 %)
Spilled SGPRs: 3541 -> 3557 (0.45 %)
Spilled VGPRs: 33 -> 33 (0.00 %)
Private memory VGPRs: 256 -> 256 (0.00 %)
Scratch size: 292 -> 292 (0.00 %) dwords per thread
Code Size: 55640332 -> 55384892 (-0.46 %) bytes
Max Waves: 964785 -> 964857 (0.01 %)

Totals from affected shaders:
SGPRS: 377352 -> 363496 (-3.67 %)
VGPRS: 209800 -> 209596 (-0.10 %)
Spilled SGPRs: 1979 -> 1995 (0.81 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 256 -> 256 (0.00 %)
Scratch size: 256 -> 256 (0.00 %) dwords per thread
Code Size: 12549300 -> 12293860 (-2.04 %) bytes
Max Waves: 105762 -> 105834 (0.07 %)

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6284>
 2020-09-06 14:36:21 +00:00
Marek Olšák ca74603b4f ac/llvm: add better code for isign 
There are 2 improvements:
- select v_med3_i32
- support vectors

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6284>
 2020-09-06 14:36:21 +00:00
Marek Olšák cecb6d1fbc ac/llvm: remove dead code handling for fmod 
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6284>
 2020-09-06 14:36:21 +00:00
Marek Olšák 44528f51bd ac/llvm: fix bcsel for v2*16 
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6284>
 2020-09-06 14:36:21 +00:00
Marek Olšák 735c3901e1 ac/llvm: fix amdgcn.rsq for v2f16 
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6284>
 2020-09-06 14:36:21 +00:00
Marek Olšák dd8561fda9 ac/llvm: fix amdgcn.fract for v2f16 
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6284>
 2020-09-06 14:36:21 +00:00
Marek Olšák ab614abeef ac/llvm: fix amdgcn.rcp for v2f16 
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6284>
 2020-09-06 14:36:20 +00:00
Marek Olšák 84500eebd7 ac/llvm: remove stub prototype for fmed3 
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6284>
 2020-09-06 14:36:20 +00:00
Marek Olšák f85294207f Revert "ac: generate FMA for inexact instructions for radeonsi" 
This reverts commit 4b9370cb0f.

Fixes: 4b9370cb0f
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3429

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6284>
 2020-09-06 14:36:20 +00:00