6c76ceb613
anv: Add support for OpenCL-style kernel dispatch
...
v2: Use brw_cs_get_dispatch_info() (Lionel)
Merge barrier fixes (Lionel)
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Acked-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16970 >
2022-09-28 05:38:37 +00:00
5814436159
anv: Set up the memory-backed FIFO buffer
...
v2: Fix incorrect goto (Caio)
Comment 3DSTATE_BTD programming (Caio)
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Acked-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16970 >
2022-09-28 05:38:36 +00:00
f2645229c2
anv: implement Wa_14016118574
...
After each 3DPRIMITIVE, we need to send a dummy post sync op if point or
line list was used or if had only 1 or 2 vertices per primitive.
v2: add missing _3DPRIM_POINTLIST_BF (Lionel)
Signed-off-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18746 >
2022-09-23 12:27:05 +00:00
f9dbb65e7f
anv: add missing wokraround for texture cache invalidate
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18743 >
2022-09-22 23:45:16 +00:00
79c2f9e7cb
anv: trace xfb queries
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17467 >
2022-09-21 12:38:34 +00:00
b12d95f513
anv: add missing tracepoint
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Fixes: 3501a3f9edivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17467 >
2022-09-21 12:38:34 +00:00
85fc1decf0
anv: remove primitive_topology from 3DPRIMITIVE calls
...
Field is ignored on BDW+, 3DSTATE_VF_TOPOLOGY is used to set topology.
We still want to preserve topology information in state because
of other upcoming changes that require it.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18698 >
2022-09-21 04:42:42 +00:00
0bf18cc483
anv: force inline more pipe flush functions
...
yields increased ~33% draw throughput
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18637 >
2022-09-20 20:53:22 +00:00
39c6e4db25
anv: combine flushes in Draw/DrawIndexed/DrawIndirectByteCountEXT
...
Based off a patch from zmike
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18637 >
2022-09-20 20:53:22 +00:00
1be09ae81a
anv: don't export gfx state flushing helper
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18637 >
2022-09-20 20:53:22 +00:00
6aa2ddb9b6
anv: don't export flush_compute_state
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18637 >
2022-09-20 20:53:22 +00:00
74658b01d2
driconf/Intel: Add lower_depth_range_rate option workaround for Homerun Clash misrendering issue
...
Intel has different Z interpolation float point rounding
than other mesa gpus
For example gl_Position.z = 0.0 will be interpolated to
gl_FragCoord.z = 0.5 for all gpus
gl_FragCoord = -0.00000001 will be interpolated to
gl_FragCoord.z = 0.4999999702 for Intel
and rounded to gl_FragCoord.z = 0.5 for other gpus
Games with LEQUAL depth func will fail depth test on Intel
and will pass it on other gpus in such case
This workaround lowers translated depth range
and several gl_FragCoord.z coords with extra small difference
will be translated to the same UINT16\UINT24\UINT32
value of an integer depth buffer
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7199
Signed-off-by: Illia Polishchuk <illia.a.polishchuk@globallogic.com >
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18412 >
2022-09-19 10:08:48 +00:00
d5dedecfe7
anv: implement draw calls for EXT_mesh_shader
...
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18371 >
2022-09-02 17:40:47 +00:00
b3354afd89
anv: replace VK_SHADER_STAGE_[TASK|MESH]_BIT_NV with VK_SHADER_STAGE_[TASK|MESH]_BIT_EXT
...
They have the same numerical values, so nothing changes.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18371 >
2022-09-02 17:40:47 +00:00
bc68e7b564
anv: Remove anv_batch_emit_reloc and just open-code it
...
We don't need the relocation offsets anymore, and just want to pin the
BO, and combine the address into a uint64_t. We can just open code
those two things; it's actually less code.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18208 >
2022-09-02 09:40:46 +00:00
7b7381e8d7
anv: Delete anv_reloc_list_add()
...
We don't need the offset to write a relocation at any longer, so all
it does is call anv_reloc_list_add_bo() at this point. Just use that.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18208 >
2022-09-02 09:40:46 +00:00
215b1b69cb
anv: Delete use_relocations flag
...
There are no relocations.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18208 >
2022-09-02 09:40:46 +00:00
f34975cdf9
anv: Delete shader constants UBO from descriptor sets
...
We now always softpin and use the load_global_constant case, so there's
no need to set up a UBO for NIR constants.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18208 >
2022-09-02 09:40:46 +00:00
428f07d906
anv: Delete image param support.
...
This was only used prior to Skylake, which anv no longer supports.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18208 >
2022-09-02 09:40:46 +00:00
3daeb22735
anv: Drop checks for version 8 or 9
...
anv no longer supports versions below this.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18208 >
2022-09-02 09:40:46 +00:00
a659819f79
anv: remove unused gfx7 code
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18208 >
2022-09-02 09:40:46 +00:00
7077b72d60
vulkan,anv,dozen: Use VK_IMAGE_LAYOUT_ATTACHMENT_FEEDBACK_LOOP_OPTIMAL_EXT
...
This has basically identical semantics to the pseudo-ext enum we were
using before. Also, now that it's in the actual Vulkan enum, we can get
rid of all the #pragma garbage to avoid compiler warnings.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18084 >
2022-08-23 16:41:55 +00:00
356a60bd6c
anv: Do not duplicate intel_device_info memory in each logical device
...
Each logical device can point to its physical device intel_device_info
saving at least one intel_device_info.
This also allow us to set 'const' to avoid values in intel_device_info
being changed by mistake.
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Acked-by: Jordan Justen <jordan.l.justen@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17897 >
2022-08-19 16:29:58 +00:00
fbd4133735
anv: emit scissors when the pipeline changes
...
With the switch to common dynamic state tracking, something got lost
that made the scissors not always be emitted when they are not dynamic
and the pipeline is marked dirty.
Since both viewport and scissors make use of each other to calculate
their values, just stick the scissor emit in the same if block as
viewport for now.
I'd rather have them decoupled, and at least the Vulkan CTS didn't
complain when I tried it, but I don't know what other effects that
may have, especially when it comes to the guardband.
Fixes a bunch of tests under
dEQP-VK.pipeline.*.multisample.misc.*
Fixes: 7d25c04236jason.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17964 >
2022-08-09 19:58:14 +00:00
845ab3d627
anv: Handle bits to flush data-port's Untyped L1 data cache
...
v2: Drop ANV_PIPE_UNTYPED_DATAPORT_CACHE_FLUSH_BIT from invalidate bits (Lionel)
Add utrace support
Expand on comment about PIPE_CONTROL::UntypedDataPortCache
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16905 >
2022-08-05 10:43:50 +03:00
79cd2c2759
anv: Specify Untyped L1 cache policy for stateless accesses
...
Set write back L1 cache policy in STATE_BASE_ADDRESS instruction for A64
messages.
v2: Also set the value in genX_state.c (Lionel)
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com >
Suggested-by: Jason Ekstrand <jason@jlekstrand.net >
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16905 >
2022-08-05 10:43:50 +03:00
5e21f47428
anv: fixup PIPE_CONTROL restriction on gfx8
...
We're missing a condition that is currently papered over by having
ANV_PIPE_HDC_PIPELINE_FLUSH_BIT in the invalidate bits.
v2: rework with simplication (Caio)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Cc: mesa-stable
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16905 >
2022-08-05 10:42:16 +03:00
e7419c11ae
anv: Make the D16 reg mode single-sampled
...
Wa_14010455700 is dependent on the format and sample count, but our
code to track whether or not it had been applied was only dependent on
the format.
As a result, we failed to enable the workaround when an app used a D16
2xMSAA buffer, then a D16 1xMSAA buffer right afterwards.
Make the workaround tracking code sample-dependent to fix this.
Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17859 >
2022-08-03 15:31:10 +00:00
8b13acd715
anv: Move Wa_1806527549 and enable by default
...
Move Wa_1806527549 into `init_render_queue_state` and
set HIZ_CHICKEN (7018h) bit = 1 by default.
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6717
Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17778 >
2022-08-02 16:33:10 +03:00
a05fcc94c2
anv: assert inheritance_info is not NULL
...
Makes some static analysis tools happier.
Reviewed-by: Mark Janes <markjanes@swizzler.org >
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17809 >
2022-07-29 22:50:21 +00:00
7d25c04236
anv: Switch to using common dynamic state tracking
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17564 >
2022-07-19 23:16:45 +00:00
97dd1a100d
anv: Rework setting primitive topology
...
For one thing, we were deceptively setting it wrong in genX_cmd_buffer.c
and then overwriting it in each of of gfx7_cmd_buffer.c and
gfx8_cmd_buffer.c. Pull it all into genX_cmd_buffer.c so it's no longer
duplicated. Also, stop doing the PATCHLIST conversion in anv_pipeline.c
and just store the number of patch vertices.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17564 >
2022-07-19 23:16:45 +00:00
44cbb7d9c8
anv: remove pipeline setting dynamic state
...
Following our rule that anything that can be dynamic should be set
(and is this case is already) in the following files :
- genX_cmd_buffer.c
- gfx8_cmd_buffer.c
- gfx7_cmd_buffer.c
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17564 >
2022-07-19 23:16:45 +00:00
36417bd05b
anv: Handle vertex buffer sizes in anv_CmdBindVertexBuffers2
...
There's no good reason to defer figuring out the size until we emit the
packet. We know everything when the bind happens.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17564 >
2022-07-19 23:16:45 +00:00
1faba01c2b
anv: Add an instance multiplier to anv_pipeline
...
This lets us get rid of the view_mask and pipeline replication logic
repeated all over everywhere.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17564 >
2022-07-19 23:16:45 +00:00
2bfcd29155
anv: move restart index to gfx state
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17601 >
2022-07-19 02:36:09 +00:00
cb6375d40c
anv: Stop compacting surface state tables
...
Instead of trying to compact the surface state table to get rid of any
unused render targets, emit MAX(1, colorAttachmentCount) surface states
always. This ensures that secondaries will always match with primaries
when we go to do the copy since there's no rule requiring the secondary
to have VK_FORMAT_UNDEFINED when the primary has a NULL image view.
Fixes: 3501a3f9edlionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17543 >
2022-07-14 20:36:24 +00:00
57a8efa222
anv: deal with isl format swizzles for buffer views
...
For some formats like VK_FORMAT_B5G6R5_UNORM_PACK16, we have no direct
matching HW format. We can support it by swizzling.
We already apply those swizzles for image views. We just forgot to
deal with buffer views.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6235
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17385 >
2022-07-13 00:45:36 +00:00
0225293a97
anv: use updated tokens from vk.xml
...
Signed-off-by: Eric Engestrom <eric@igalia.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17342 >
2022-07-12 15:53:11 +00:00
f4386b81e6
intel: fix typos found by codespell
...
Acked-by: David Heidelberg <david.heidelberg@collabora.com >
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17191 >
2022-06-27 10:20:55 +00:00
6216c59dbb
vulkan/render_pass: Use a special layout for self-dependencies
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16953 >
2022-06-24 22:37:53 +00:00
f10012a2b2
anv: Use CmdBeginRendering for resumes in BeginCommandBuffer when possible
...
This lets us avoid the code duplication between BeginRendering and
BeginCommandBuffer and also lets us stop crawling core render pass
structs directly and instead focus on dynamic rendering concepts.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16953 >
2022-06-24 22:37:53 +00:00
4f10eddf77
anv: fix index buffer emission
...
In the following case :
vkCmdBindPipeline(compute_pipeline);
vkCmdDispatch(...);
vkCmdBindPipeline(graphics_pipeline);
vkCmdBindIndexBuffer(buffer)
vkCmdDraw(...);
We're emitting the 3DSTATE_INDEX_BUFFER instruction while the HW is
still in GPGPU mode, because we're dealing the pipeline selection to
vkCmdDraw().
Found while debugging Age Of Empire 4, HW is hung on
3DSTATE_INDEX_BUFFER instruction.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Cc: mesa-stable
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17153 >
2022-06-21 16:24:10 +00:00
7a8ec23c9d
anv: Properly clamp attachment layer counts
...
Vulkan requires that the acutal layer count come from
VkRenderingInfo::layerCount or VkFramebufferCreateInfo::layers rather
than from the image view itself.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17060 >
2022-06-17 18:33:58 -05:00
5d0b09be5b
anv: Use the base vk_buffer struct
...
This mostly gets us the vk_buffer_range() helper but may be useful in
the future.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16607 >
2022-05-27 18:38:57 -05:00
27314718a3
intel: Drop Wa_1409226450 (stall before instruction cache invalidation)
...
Production Tigerlake and DG1 hardware shouldn't need this workaround.
It was only needed on the very first steppings which never went public.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16575 >
2022-05-19 21:31:45 +00:00
1c077ca9c0
u_trace/anv/iris: drop cs argument for recording traces
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16605 >
2022-05-19 19:04:28 +00:00
2e46f38902
anv: re-alloc push constants after secondary command buffers
...
If the secondary command buffer executed used push constants on a
different set of stages than the primary is using, we may end up not
reallocating them for the primary, getting misrender artifacts at best,
or a nice GPU hang at worst.
Fixes the tests from a CTS from the future:
dEQP-VK.dynamic_rendering.random.*
Cc: mesa-stable
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16439 >
2022-05-10 21:56:49 +00:00
797a8850b9
anv: remove static_state_mask
...
This is now unnecessary. Either an instruction is never dynamic and
it's emitted in genX_pipeline.c or it can be and it's emitted in
genX_cmd_buffer.c/gfx8_cmd_buffer/gfx7_cmd_buffer.c
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16220 >
2022-05-03 17:12:45 +00:00
065242d623
anv: don't emit 3DSTATE_STREAMOUT in pipeline batch
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16220 >
2022-05-03 17:12:44 +00:00
Jason Ekstrand