AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
166,309 Commits 1 Branch 0 Tags
6ace3d6cf060cbe86c3f7b8ba22a9c4395837ee8
Commit Graph

262 Commits

Author SHA1 Message Date
Jonathan Gray a23e04b673 intel/dev: remove invalid EHL pci id 
removed in linux
0e8e272f1368 ("drm/i915/ehl: Remove invalid PCI ID")

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21129>
 2023-02-06 16:48:39 +00:00
Marcin Ślusarz 432e263284 intel/compiler: fine-grained control of dispatch widths 
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> [v2]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20854>
 2023-01-27 11:00:41 +00:00
José Roberto de Souza 2c42641994 intel/dev: Detect what is the kernel mode driver loaded 
Intel GPUs will have a new kernel mode driver, support for some
platforms will overlap so we will need to detect in runtime what is
the kernel mode driver loaded for each device.

Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20773>
 2023-01-25 09:16:55 -08:00
José Roberto de Souza c1d99283e6 intel/dev: Split hwconfig i915 specific code 
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20437>
 2023-01-20 17:26:08 +00:00
José Roberto de Souza b3b769894e intel/dev: Move i915 code to i915/intel_device_info.c 
No behavior changes here.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20437>
 2023-01-20 17:26:08 +00:00
José Roberto de Souza 1332702cf4 intel/dev: Export functions that will be used by different kernel drivers 
No behavior changes here.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20437>
 2023-01-20 17:26:08 +00:00
Nico Cortes 29adbb132f Revert "intel/compiler: fine-grained control of dispatch widths" 
This reverts commit bed18ab3e2.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8063
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20654>
 2023-01-12 00:33:25 +00:00
Marcin Ślusarz bed18ab3e2 intel/compiler: fine-grained control of dispatch widths 
Reviewed-by: Matt Turner <mattst88@gmail.com> [v1]
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20535>
 2023-01-11 08:17:12 +00:00
Tapani Pälli 7db1b94e07 intel/dev: setup 1024 GS urb entries for ADL-N 
v2: apply only for devices with less than 32 EUs (Lionel)

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7942
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20414>
 2022-12-23 09:51:01 +00:00
Jianxun Zhang 6e33423a6f intel/dev: Enable AUX map on MTL 
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20322>
 2022-12-15 11:43:00 -08:00
Paulo Zanoni a099d6ae4d intel: add devinfo->has_64bit_float_via_math_pipe 
Unusual hardware features that require special hanlding usually get a
devinfo field, so do this for MTL's unordered DF types. This will
guarantee that any platform based on MTL (thus inheriting from
MTL_FEATURES) will automatically be handled in these special cases.

v2: s/has_unordered_64bit_float/has_64bit_float_via_math_pipe/ (Curro).

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20072>
 2022-12-10 03:59:19 +00:00
Nanley Chery 822687f4c0 intel/dev: Add a has_illegal_ccs_values flag 
Whether or not CCS can be used without initialization depends on the
platform:

- On gfx7-8, each CCS element is 1-bit and encodes "fast-cleared" or
  "pass-through". So, those platforms have no illegal values.

- On gfx9-11, each CCS element is 2-bits and some bit combinations
  are invalid.

- On gfx12+, each CCS element is 4-bits but they have no truly illegal
  values. Unused encodings are interpreted as "pass-through".

Refer to the "MCS/CCS Buffers for Render Target(s)" sections of the
PRMs for more info.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20118>
 2022-12-06 00:49:17 +00:00
Jordan Justen 686ada78cd intel/dev: Add (disabled) device info for MTL 
Reworks:
 * Jordan: INTEL_PLATFORM_MTL_M/INTEL_PLATFORM_MTL_P
 * Lionel: .has_coarse_pixel_primitive_and_cb
 * Jordan: .has_mesh_shading & .has_ray_tracing
 * Paulo: .has_64bit_float
 * José: .has_integer_dword_mul (BSpec: 47431)
 * Jordan: Comment pci device ids for now similar to DG2:
   * 70a4e64685 ("intel: Add *disabled* device ids for DG2")
   * ad565f6b70 ("intel/dev: Enable first set of DG2 PCI IDs")

Ref: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/include/drm/i915_pciids.h?h=v6.0-rc4#n736
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19658>
 2022-12-01 16:22:47 +00:00
Jianxun Zhang 93baad8047 intel/dev: Set 'has_flat_ccs' flag for DG2 
The code paths of flat ccs should be working on DG2 because
they are routed by other conditions like GFXVer so far. But
using this flag is the intended way, and we need to have
this change prior to updating these conditions with the flag.

Ref: 5262475242 ("intel/dev: Add a has_flat_ccs flag")

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20043>
 2022-11-29 02:47:44 +00:00
Jordan Justen ed84f163ff intel/dev: Add devinfo::has_caching_uapi (and disable for dg1 and dg2+) 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19911>
 2022-11-28 21:54:20 +00:00
José Roberto de Souza 29550bc50a intel: Add has_context_isolation to intel_device_info 
Iris, hasvk and anv were fetching the same information, better do it
on one place.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19425>
 2022-11-07 17:22:14 +00:00
José Roberto de Souza d5d1331381 intel: Add has_userptr_probe to intel_device_info 
Iris, hasvk and anv were fetching the same information, better do it
on one place.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19425>
 2022-11-07 17:22:14 +00:00
José Roberto de Souza e9eceb1106 intel: Add has_mmap_offset to intel_device_info 
All 4 drivers were fetching the same information, better do it on one
place.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19425>
 2022-11-07 17:22:14 +00:00
Jordan Justen d911eb17d8 intel/dev: Set has_lsc in XEHP_FEATURES rather than DG2_FEATURES 
MTL will want this set as well.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19447>
 2022-11-02 20:00:08 +00:00
Illia Abernikhin aa4ac5ff8b utils: Merge util/debug.* into util/u_debug.* and remove util/debug.* 
Rename env_var_as_unsigned() -> debug_get_num_option(), because duplicate
Rename env_var_as_bool() -> debug_get_bool_option(), because duplicate

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7177

Signed-off-by: Illia Abernikhin <illia.abernikhin@globallogic.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19336>
 2022-11-02 07:25:39 +00:00
Matt Turner 3ef88cd0a2 intel/dev: Set display_ver = 13 on all ADL/RPL/DG2 
display_ver doesn't seem to be used anywhere, but if that were to
change, we'd want this to be consistent.

Fixes: c746bf4c5c ("intel/dev: Add display_ver and set adl-p to 13")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19354>
 2022-10-28 01:31:44 +00:00
José Roberto de Souza 5269d91efc intel: Convert missing i915 engine types to intel 
This convertions were missed due to bad rebased in my end, sorry.

Fixes: 03b959286e ("intel: Make engine related functions and types not i915 dependent")
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18975>
 2022-10-15 20:04:51 +00:00
Lionel Landwerlin 1964899c28 intel: add INTEL_DEBUG=capture-all to capture everything upon hang 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewd-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18977>
 2022-10-07 07:45:22 +00:00
José Roberto de Souza a17783b066 intel/dev: Split i915 specific parts of intel_get_device_info_from_fd() 
Continuing the work to split i915_drm.h specific code.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18942>
 2022-10-04 18:35:50 +00:00
Jason Ekstrand 647773a094 intel/devinfo: DG2 supports ray-tracing 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16970>
 2022-09-28 05:38:37 +00:00
Lionel Landwerlin c6a7f4b34e intel/devinfo: Rename & implement num_dual_subslices 
v2: Use the upper bound of dual subslices as the ID is not remapped
with fused off parts and this is what we'll use for a bunch of
computation in RT.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16970>
 2022-09-28 05:38:36 +00:00
José Roberto de Souza 89d2cdad37 intel/dev: Adjust prefetch_size values for MTL engines 
MTL has different CS prefetch sizes for each CS type.
So here replacing the cs_prefetch_size in intel_device_info struct
by a function that takes as argument the i915 engine class.

Fixes:
- func.cmd-buffer.small-secondaries.q0
- dEQP-VK.multiview.secondary_cmd_buffer.*
- Several other VK CTS tests that uses secondary_cmd_buffer

v2:
- renamed to intel_device_info_get_engine_prefetch() (Jordan)

v3:
- renamed to intel_device_info_calc_engine_prefetch()
- store each engine class prefetch in intel_device_info

BSpec: 45718
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18597>
 2022-09-22 02:14:47 +00:00
Jordan Justen 582bad0256 intel/devinfo: Add MTL platforms enums and intel_device_info_is_mtl() 
Ref: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/include/drm/i915_pciids.h?h=v6.0-rc4#n736
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18482>
 2022-09-13 00:30:22 +00:00
Caio Oliveira 7cd06249b9 intel/compiler: Remove INTEL_DEBUG=tcs8 
For Gen11 and prior, the dispatch mode for TCS was SINGLE_PATCH, and
this debug setting could be used to change it to 8_PATCH (falling back
to SINGLE_PATCH when shader couldn't be in the multi dispatch mode).
However after talking to Ken, seems this debug setting is not really
worth keeping around, so removing it.

For Gen12+ the only option is 8_PATCH, so it was always using that
dispatch mode as before.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18151>
 2022-08-24 00:39:57 +00:00
Yonggang Luo 201a62cbba meson: Use different STRACEDIR folder for intel_devinfo_override_test 
Fixes
--- stderr ---
strace: Can't fopen 'meson-logs/strace/intel_device_info_override_test_120_/log.10613': No such file or directory

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17928>
 2022-08-22 14:18:53 +00:00
Lionel Landwerlin 8c9dd9e783 intel/dev: remove INTEL_DEVID_OVERRIDE 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17831>
 2022-08-02 11:17:58 +00:00
Lionel Landwerlin 7f82ab7104 intel/dev: add a test verifying that device override works 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17831>
 2022-08-02 11:17:58 +00:00
Lionel Landwerlin 186ff4696a intel/dev: move verification function to a header 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17831>
 2022-08-02 11:17:58 +00:00
Mark Janes 6401d768b9 intel/dev: drop warning for unhandled hwconfig keys 
The hwconfig api may change unexpectedly prior to public release of
new platforms.  Also, public documentation of the hwconfig api
sometimes lags the release.

For these reasons, warnings about unhandled hwconfig keys are noisy,
likely to occur, and unhelpful to most users.  This commit drops those
warnings, in favor of a separate internal process for tracking
hwconfig api changes.

Suggested-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by:  Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17846>
 2022-08-02 08:08:02 +00:00
Jordan Justen 68b88fae8c intel/dev: Fill in system memory info when using INTEL_DEVID_OVERRIDE 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17828>
 2022-08-01 23:54:55 +00:00
Jordan Justen 2863e720f0 intel/dev: Determine the amount of free vram using small BAR uapi 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16739>
 2022-07-26 20:34:02 +00:00
Jordan Justen acc6457ff4 intel/dev: Use i915 region probed_cpu_visible_size when non-zero 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16739>
 2022-07-26 20:34:02 +00:00
Jordan Justen 7bd3a6b757 intel/dev: Add intel_vram_all_mappable() 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17349>
 2022-07-21 20:27:10 +00:00
Jordan Justen a3316d38d1 intel/tools: Print unmappable region info in intel_dev_info 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17349>
 2022-07-21 20:27:10 +00:00
Jordan Justen d2829ffe4e intel/dev: Add vram.unmappable.size region info 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17349>
 2022-07-21 20:27:10 +00:00
Lionel Landwerlin 09ba5c2b43 intel/dev: deal with i915 unallocated_size on smem 
We cannot rely on unallocated_size on system memory for
VK_EXT_memory_budget.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 4aecfbf0f4 ("intel/dev: Add devinfo::mem to store i915 regions information")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17349>
 2022-07-21 20:27:10 +00:00
Marcin Ślusarz f4386b81e6 intel: fix typos found by codespell 
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17191>
 2022-06-27 10:20:55 +00:00
Jordan Justen a7127fbc4c intel/tools: Print memory info in intel_dev_info 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17075>
 2022-06-22 00:30:49 +00:00
Lionel Landwerlin 4289c9ec13 intel/dev: add a fallback when memory regions are not available 
We have this in Anv and it could be reused in Iris for integrated
memory system.

Rework:
 * Jordan: Drop regions.valid (Lionel implemented a fallback)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17075>
 2022-06-22 00:30:49 +00:00
Lionel Landwerlin 4e727297e8 intel/dev: add a helper to update memory info 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17075>
 2022-06-22 00:30:49 +00:00
Jordan Justen 4aecfbf0f4 intel/dev: Add devinfo::mem to store i915 regions information 
Reworks:
 * Lionel: Change check on memory region valid to vram size
 * Jordan: Drop regions.valid (Lionel implemented a fallback)
 * Jordan: Rename devinfo::regions to devinfo::mem.
 * Jordan: Add devinfo::mem::use_class_instance
 * Add mesa_logw for lmem requiring regions. (s-b Lionel)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17075>
 2022-06-22 00:30:49 +00:00
Marcin Ślusarz 4e4ef72aac intel/dev: fixup max_cs_workgroup_threads after hwconfig is read 
Without it we get max value from gfx12 on gfx>12.

Fixes: d9ff9ea9c3 ("intel/dev: Read hwconfig from i915")

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17063>
 2022-06-20 07:43:43 +00:00
Kenneth Graunke 18b3ad5a09 intel: Set a more useful fake devinfo->gtt_size in no-hw mode 
With the old value, anv didn't think that the hardware supported 48-bit
addresses, and hit this assert:

   assert(device->supports_48bit_addresses == !device->use_relocations);

The new value of 1ull << 48 is the one reported on my Icelake machine.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16933>
 2022-06-10 00:56:36 +00:00
Jordan Justen ad565f6b70 intel/dev: Enable first set of DG2 PCI IDs 
Mostly Matt Roper's kernel patch commit message:

The IDs added here are the subset reserved for 'motherboard down'
designs of DG2. We have all the necessary support upstream to enable
these now.

The remaining DG2 IDs for add-in cards will be enabled in a future
patch once some additional required functionality has fully landed.

Ref: https://patchwork.freedesktop.org/patch/msgid/20220425211251.77154-3-matthew.d.roper@intel.com
Cc: 22.1 <mesa-stable>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16449>
 2022-05-12 03:03:57 -07:00
Jordan Justen 4456209ce5 intel/dev: Add INTEL_PLATFORM_DG2_G12 
Cc: 22.1 <mesa-stable>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16449>
 2022-05-12 03:03:57 -07:00