Stop relying on the submit BO list, which won't exist with the new
"VM_BIND" uAPI. Instead, create a separate list in generic code, only
when dumping is enabled. As a bonus this means that it should work on
virtio and kgsl too, and more code is removed from the kernel backend.
We need to use the generic fence wait introduced in the previous commit.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32165>
Contrary to what the comment said, kgsl and drm actually have very
similar semantics for fences. Add a common function to wait on a fence,
and embed the queue + fence directly instead of a syncobj abstraction
that doesn't actually gain us much. This common fence wait function will
also be helpful for making more code generic.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32165>
Each driver implemented the Vulkan runtime submit callback itself, which
resulted in a lot of duplicated code to iterate through the command
buffers and gather the list of IBs to execute, deal with autotune and
command buffers with suspending/resuming dynamic renderpasses, etc. This
has been getting steadliy worse and was only going to get worse with
sparse, since to implement sparse bind submissions we have to similarly
traverse and flatten an array of bind structures.
Borrow an idea from nvk, and add an abstraction of a "submit" object
which holds a (dynamically growing) list of pending commands to submit.
We add kernel-specific functions to create a submit, add commands to it,
and finally submit it. For sparse, we will add additional an additional
function that adds a sparse bind and then we will parse the Vulkan
structures in common code. For now, we move various misc.
driver-independent parts of the submission path into a common
tu_queue_submit() that calls into the new abstractions.
In the future, if we need to add driver-internal syncobjs to the
user-provided ones, we could use the same approach with waits and
signals. For now we provide them as part of the submit function.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32165>
Because most pool-allocations happens during rendering, we have the same
issue as in the previous commit; we don't have a good way to report
the out-of-memory error here. So we do one of two things; we either
return a NULL-ish pointer, or we print an error and ignore the call.
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32428>
When allocations fail, we can end up with NULL-batches. This means we
can't really do much, so let's bail what we're trying to do here.
Unfortunately, we can't always report this up to the call-site easily,
because some pipe_context functions don't allows us to return a
pipe_error value. So in those cases, make let's just return log an error
and return as if nothing happened. It's not great, but there's nothing
super obvious to do here.
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32428>
There's more than one error-path out of cs_alloc_ins_block(), but only
one of them got the discar_instr_slot treatment. Instead of plugging
this in one more time, let's move this handling up to cs_alloc_ins(),
where we can easily whack two birds with one stone. This makes us
consistently return NULL on error here.
At the same time, we need to patch up cs_flush_block_instrs() here,
because we don't actually set the buffer invalid here. So let's
check for NULL here instead, which is the new contract.
Fixes: 0e6aaab00a ("pan/cs: add block to handle registers backup in exception handler")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32428>
Cross-invocation TCS input access doesn't prevent same-invocation access.
This improves shaders that use both for the same inputs.
Also, if some components of a vec4 slot only use same-invocation access and
other components only use cross-invocation access (it's possible after
compaction), this takes the VGPR path for the components with
same-invocation access, which didn't happen previously because all masks
only describe whole vec4s.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31673>
Both can be used. Cross-invocation access can read it from LDS, while
same-invocation access can read it from VGPRs.
The entrypoints of the passes don't allow that flexibility yet,
but the logic inside the pass allows it.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31673>
We're parsing the descriptors here to read the size of the resource, but
what the HW wants and imageSize() wants is not the same. So let's fix up
the result for imageSize(), by dividing the result by 6.
If we change the descriptor instead, we end up failing shader-image
reads and writes instead.
I also looked for some unused bits in the descriptor that I could use
instead, but unfortunately there's only a few bits free here - not
enough for our needs.
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Benjamin Lee <benjamin.lee@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32612>
Previous code was assuming that load_sample_id loaded the hardware
sample ID register, which is 32 when sample shading is disabled. The
expectation was that we would read (0.5,0.5) from sample_positions[32].
Because the top 3 bits of the sample ID register are masked out in
bi_load_sample_id_to, we were instead reading the position of the first
sample.
This doesn't affect OpenGL, because opengl never uses
nir_load_sample_pos when sample shading is disabled.
Signed-off-by: Benjamin Lee <benjamin.lee@collabora.com>
Fixes: 60146cc57c ("panvk: implement sampleRateShading")
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32601>
The CI_JOB_TIMEOUT variable is the GitLab-defined job timeout in
seconds.
Use this variable in LAVA instead of the separate JOB_TIMEOUT,
which was intended to represent the test phase timeout (job timeout
minus 5 minutes), but was often overlooked.
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32609>
At the moment, we're not initializing the base_{instance,vertex} sysvals
which we'll need to do if we want to support shader draw parameters. It
turns out even without shader draw parameters enabled, some shaders need
a valid base_instance value, so this alone should fix a few tests.
On CSF hardware, we have a way to pass a non-zero base instance that's
propagated to the instance ID, but this messes with instance divisors,
so instead of using the native base instance feature, we force it to
zero, pass the base instance through an FAU sysval, and let
panvk_lower_load_vs_input() do the lowering for vertex attribute loads.
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32039>
load_attribute_pan is a panfrost-specific intrinsic for loading
vertex attributes. Takes explicit vertex and instance IDs which
we need in order to implement vertex attribute divisor with
non-zero base instance on v9+.
Passes which are used by panvk are modified to be aware of
load_attribute_pan.
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32039>
Connor Abbott