56bbbc8322
intel/compiler: Free resources on test teardown
...
Ensure that all resources are properly released by
properly parenting them to a memory context and releasing
the context during test teardown.
Signed-off-by: Rohan Garg <rohan.garg@collabora.com >
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8162 >
2021-02-16 15:07:52 +01:00
628c10f14e
intel/genxml: Free resource before exiting
...
Signed-off-by: Rohan Garg <rohan.garg@collabora.com >
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8162 >
2021-02-16 15:07:52 +01:00
65d52aef82
intel/dump_gpu: mark bo as unmapped if its address changes
...
Fixes crash in ppgtt_lookup when the same bo is used twice
with different offsets.
It's possible to hit this with i965 and always_flush_batch=true.
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9008 >
2021-02-15 11:40:58 +00:00
5da10cefe2
intel/tools/aub: remove superfluous new line from error messages
...
This function is used as a callback and the other instance
of this callback doesn't add its own new line.
Messages printed by this function already end with a new line.
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8988 >
2021-02-15 11:35:23 +00:00
aeae177198
intel/tools/aub: handle truncated input file
...
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8988 >
2021-02-15 11:35:23 +00:00
0893f6f03f
intel/tools/aub: print better error message when mmap fails
...
Aubinator creates lots of 4k mappings, so for large traces it's
possible to hit system limit on the number of mappings created
by a single process.
Ideally, aubinator should merge those mappings, but that's tricky
and I'm not sure it's worth spending time on.
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8988 >
2021-02-15 11:35:23 +00:00
9da54b9252
intel/compiler: Use gl_varying_slot_name_for_stage()
...
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8998 >
2021-02-13 00:44:53 +00:00
72b8e643b0
anv: Allow null handle in DestroyDescriptorUpdateTemplate.
...
By the Vulkan specification, and similarly to many other Vulkan calls,
it is allowed to destroy a null descriptor update template.
Signed-off-by: Giovanni Mascellani <gmascellani@codeweavers.com >
Fixes: af5f13e58clionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9005 >
2021-02-12 09:30:46 +00:00
89580073f3
anv: Add ANV_QUEUE_OVERRIDE env-var to override advertised queues
...
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8771 >
2021-02-11 19:58:23 +00:00
1326e1c0fe
anv: Add fake graphics-only and compute-only queue families
...
Rework:
* Jordan: Add graphics-only queue
* Jordan: Bump ANV_MAX_QUEUE_FAMILIES and add related asserts
* Jordan: Fix queueCount on compute-only family
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8771 >
2021-02-11 19:58:23 +00:00
6673c40011
anv: discard all timeline wait/signal value=0
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Fixes: 34f32a6d66https://gitlab.freedesktop.org/mesa/mesa/-/issues/4277
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8987 >
2021-02-11 17:16:17 +00:00
f961cf2047
blorp: Assert 8x4 alignment for a HiZ op on Gen8-9
...
On BDW and SKL, assert that render target dimensions are 8x4-aligned
when performing HiZ ambiguates on LOD1+. Testing indicates that the
assertion should hold in order to achieve consistent/correct ambiguate
operations on gen9.
v2. Account for the relaxed restrictions on ICL+. (Ken)
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3788
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8853 >
2021-02-10 20:48:01 +00:00
0b69e8b16f
anv: print out perf permission warning only once
...
This warning is bothering a number of people and rightfully so.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8955 >
2021-02-10 15:55:52 +02:00
6c489dfefc
intel/stub: plug some gaps in our ioctl faking
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8934 >
2021-02-09 21:08:52 +00:00
64cb03a52d
anv: only signal wsi fence BO on last command buffer
...
I'm pretty sure this doesn't fix anything because the WSI code only
use a single VkSubmitInfo, but better be safe.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Fixes: ccb7d606f1jason@jlekstrand.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8934 >
2021-02-09 21:08:52 +00:00
8297a9a429
anv: break up internal queueing function
...
We want more control over batching things up when possible to minimize
the round trips to i915. This breaking up of one big internal function
into helpers will be useful later.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8934 >
2021-02-09 21:08:52 +00:00
e93344288b
anv: add a comment describing has_relocs field
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8934 >
2021-02-09 21:08:52 +00:00
5445e28749
android: anv: implement anv layer of INTEL_MEASURE
...
Fixes the following building errors in Android:
FAILED: out/target/product/x86_64/obj/SHARED_LIBRARIES/vulkan.android-x86_intermediates/LINKED/vulkan.android-x86.so
...
ld.lld: error: undefined symbol: _anv_measure_add_secondary
ld.lld: error: undefined symbol: anv_measure_init
ld.lld: error: undefined symbol: anv_measure_destroy
ld.lld: error: undefined symbol: anv_measure_reset
ld.lld: error: undefined symbol: anv_measure_device_destroy
ld.lld: error: undefined symbol: anv_measure_device_init
ld.lld: error: undefined symbol: _anv_measure_submit
ld.lld: error: undefined symbol: anv_measure_acquire
ld.lld: error: undefined symbol: _anv_measure_snapshot
ld.lld: error: undefined symbol: _anv_measure_endcommandbuffer
ld.lld: error: undefined symbol: _anv_measure_beginrenderpass
Fixes: 4a2d9e44ffissor.oruam@gmail.com >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8887 >
2021-02-06 11:06:17 +01:00
9664bb1f3b
android: intel: Print GPU timing data based on INTEL_MEASURE
...
Fixes the following building errors in Android:
FAILED: out/target/product/x86_64/obj/SHARED_LIBRARIES/vulkan.android-x86_intermediates/LINKED/vulkan.android-x86.so
...
ld.lld: error: undefined symbol: intel_measure_init
ld.lld: error: undefined symbol: intel_measure_state_changed
ld.lld: error: undefined symbol: intel_measure_snapshot_string
ld.lld: error: undefined symbol: intel_measure_gather
ld.lld: error: undefined symbol: intel_measure_frame_transition
Fixes: 0f4143ec37issor.oruam@gmail.com >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8887 >
2021-02-06 11:06:13 +01:00
27d496706e
anv: Move extension tables to anv_device.c
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Tested-by: Tapani Pälli <tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8792 >
2021-02-04 20:02:12 +00:00
2d6de5d227
anv,vulkan: Move anv_icd.py to a common location
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Tested-by: Tapani Pälli <tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8792 >
2021-02-04 20:02:12 +00:00
91931c4edd
anv: Make anv_icd.py more generic and independent
...
Instead of depending on anv_extensions.py, fetch the patch version from
the XML ourselves. This way it can be moved to common code and used by
other ICDs going forward.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Tested-by: Tapani Pälli <tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8792 >
2021-02-04 20:02:12 +00:00
c7a045ed63
anv: Pull the patch version from the XML
...
For years, I've maintained that I like to bump this number manually
because it gives me a point at which to say, "I've looked at most of the
issues and I think we're up to date." The reality, however, is that I
just bump it every few months and don't really do any thorough checking.
We may as well just bump it on header updates.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Tested-by: Tapani Pälli <tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8792 >
2021-02-04 20:02:12 +00:00
0260b4a7e7
vulkan: Add a common helper for enumerating instance extension properties
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Tested-by: Tapani Pälli <tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8792 >
2021-02-04 20:02:12 +00:00
a545fe9742
intel/perf: introduce additional ralloc context parameter
...
This makes it possible to use a separate ralloc context, not gl context
itself which might not be allocated with ralloc.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8805 >
2021-02-03 16:37:59 +00:00
095fd121a3
intel/perf: cleanup, remove duplicate function declaration
...
Signed-off-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8805 >
2021-02-03 16:37:59 +00:00
d49b0fa72f
anv: Implement VK_KHR_zero_initialize_workgroup_memory
...
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8708 >
2021-02-02 17:06:56 +00:00
eec2d4e466
anv: switch intel perf queries to query layout
...
Apart from the single additional marker field, these queries will now
use the same layout as all other drivers.
This should allow us to modify a single component to add an additional
register for new metrics.
v2: Capture the query beging registers in reverse order to ensure
timestamp is as close as possible from measured draw call.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6518 >
2021-02-02 13:25:55 +00:00
8ca1f488e6
anv: switch khr perf query code to use query layout
...
This unifies performance data gathering between the GL & Vulkan
drivers.
v2: Also move all NOOPs to before the query, leaving none inside
v3: Capture the query beging registers in reverse order to ensure
timestamp is as close as possible from measured draw call.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6518 >
2021-02-02 13:25:55 +00:00
76bba61e0b
anv: compute commands required to implement perf queries
...
We'll use this later to try to limit the number of NOOPs emitted for
self modifying batches.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6518 >
2021-02-02 13:25:55 +00:00
185df6ac9c
intel/perf: drop the special READ_REG operator
...
Makes things a bit more uniform.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6518 >
2021-02-02 13:25:55 +00:00
f721f2ad05
intel/perf: add DG1 support
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Acked-by: Marcin Ślusarz <marcin.slusarz@intel.com >
Acked-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6518 >
2021-02-02 13:25:55 +00:00
1b335bc55a
intel/perf: add RKL support
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Acked-by: Marcin Ślusarz <marcin.slusarz@intel.com >
Acked-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6518 >
2021-02-02 13:25:55 +00:00
4d6741b11b
intel/dev: identify rocketlake
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6518 >
2021-02-02 13:25:55 +00:00
1b3443fbd9
intel/perf: break TGL perf configs in GT1/2
...
Programming and equations are different enough that we really need 2
files.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Acked-by: Marcin Ślusarz <marcin.slusarz@intel.com >
Acked-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6518 >
2021-02-02 13:25:55 +00:00
f97fc0ff8b
intel/dev: identify tigerlake
...
We'll need that to pick the right query sets between TGL/RKL/DG1.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6518 >
2021-02-02 13:25:55 +00:00
6afe5d3624
intel/perf: add async compute metrics
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Acked-by: Marcin Ślusarz <marcin.slusarz@intel.com >
Acked-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6518 >
2021-02-02 13:25:55 +00:00
7335faa1a9
intel/perf: small ICL equation refactor
...
No functional changes.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Acked-by: Marcin Ślusarz <marcin.slusarz@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6518 >
2021-02-02 13:25:55 +00:00
b5f32e948f
intel/perf: update files from IGT
...
IGT has received a bunch of updates, this is resyncing the files with
it.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com >
Acked-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6518 >
2021-02-02 13:25:55 +00:00
5d0886089e
intel/perf: remove reordering script
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Acked-by: Marcin Ślusarz <marcin.slusarz@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6518 >
2021-02-02 13:25:55 +00:00
01179d2bc3
intel/perf: reorder xml files
...
Make the file match the order of the ones from IGT (which have changed
because of python2->3 transition).
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Acked-by: Marcin Ślusarz <marcin.slusarz@intel.com >
Acked-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6518 >
2021-02-02 13:25:55 +00:00
12ee1ec25e
intel/perf: add reorder script
...
When transitioning the oa-*.xml files from Gputop to IGT, we also had
to deal with a python2->3 transition. Unfortunately the implementation
dependent hash table ordering leaked into the XML files and so things
changed quite a bit.
This script reorders things from the old to the new order in the
existing files.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Acked-by: Marcin Ślusarz <marcin.slusarz@intel.com >
Acked-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6518 >
2021-02-02 13:25:54 +00:00
404d0f7626
intel/perf: rename lkf into ehl
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6518 >
2021-02-02 13:25:54 +00:00
3ed29f944c
anv: remove unused query pool field
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6518 >
2021-02-02 13:25:54 +00:00
0e64912446
anv: fix layout comment
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6518 >
2021-02-02 13:25:54 +00:00
3c51325025
intel/perf: switch query code to use query layout
...
That way we can describe new registers to that could be used both by
Anv & Iris/i965 without having to modifying code in multiple places.
v2: Do reverse order for begin queries so that we have MI_RPC as close
as possible from the drawcall
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6518 >
2021-02-02 13:25:54 +00:00
8750f43a90
intel/perf: add performance query layout using MI_SRM
...
For all generations supported we had a layout describing what register
to store to implement a MI_RPC replacement.
This is because, on Gen12 we need to snapshot OAG registers to get
correct values for the perf equations. There, the MI_RPC instruction
captures OAR register which do not have all the information we need.
v2: Fix commented code for debug (Marcin)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6518 >
2021-02-02 13:25:54 +00:00
f32d1bf529
intel/perf: query register descriptions
...
This will be useful when we implement queries using a series of MI_SRM
instead of MI_RPC.
Unfortunately on Gen12, the MI_RPC command sources values from the OAR
unit which has a similar series of register as the OAG unit but some
of the configuration of HW doesn't reach OAR so we have to snapshot
OAG manually instead.
v2: Fix comments
Use const
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6518 >
2021-02-02 13:25:54 +00:00
a6e980e9bf
intel/perf: prep work to enable new perf counters
...
Those are not part of the OA reports and need some additional
scaffolding. Those counters are only available when doing queries as
we need to emit MI_SRMs to record them.
Equations making use of those counters are not there yet, they will
come in a follow up commit updating a bunch of oa-*.xml files.
v2: Fix typo
v3: Use PERF_CNT_VALUE_MASK (Marcin)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6518 >
2021-02-02 13:25:54 +00:00
969f6efbc2
genxml: PERFCNT registers are available since HSW
...
We were using those registers on Gen7.5 in the GL driver already, we
just need them in Genxml for Anv too.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6518 >
2021-02-02 13:25:54 +00:00
Rohan Garg