Commit Graph

5581 Commits

Author SHA1 Message Date
Tapani Pälli
e6b24221af anv: implement WA 14018283232
WA 14018283232 indicates that we need to emit the resource barrier
when the following expression toggles value :

  STATE_DEPTH_BOUNDS::depthboundstestenable & 3DSTATE_PS_EXTRA:: Pixel Shader Kills Pixel & 3DSTATE_PS_EXTRA:: Pixel Shader Valid

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29297>
2024-06-05 15:22:25 +00:00
Lionel Landwerlin
108e79db1a anv: factor out some more gpu_memcpy setup
We want to have all the setup/workaround in a single spot.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29297>
2024-06-05 15:22:25 +00:00
Lionel Landwerlin
d98c47ccc3 anv: rewrite Wa_18019816803 tracking to be more like state
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29297>
2024-06-05 15:22:25 +00:00
Kevin Chuang
9f22b31ce8 anv: toggle meshShaderQueries based on whether we support mesh_shader or not
Fixes: 4c7f51d3 ("anv: implement mesh shader queries")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29538>
2024-06-05 04:35:11 +00:00
José Roberto de Souza
1e0a0b4dd5 anv: Initialize variable to fix static analyzer warning
Static analyzer is complaning that tex_src could be not initialized
and then used, this should not happen as an instruction with type of
'tex' type needs to have source a texture handle.

But to make static analyzer happy here just initializing it to zero.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29530>
2024-06-04 17:38:17 +00:00
Faith Ekstrand
a7db1e80d0 anv: Advertise VK_EXT_shader_replicated_composites
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29509>
2024-06-04 16:34:48 +00:00
Kevin Chuang
4c7f51d3b4 anv: implement mesh shader queries
Mesh shader queries include mesh-primitives-generated count and
task/mesh shader pipeline statistics.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29523>
2024-06-04 16:24:48 +00:00
Kevin Chuang
b69f7f625b anv: Update pipeline statistics mask for task/mesh shader invocations
Since VkQueryPipelineStatisticFlagBits is extended by two bits for
task/mesh shader invocations, ANV_PIPELINE_STATISTICS_MASK should be
defined conditionally based on GFX_VER.

This commit modifies the mask and updates the vk_pipeline_stat_to_reg
array accordingly.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29523>
2024-06-04 16:24:48 +00:00
Lionel Landwerlin
d9567b5ee4 anv: fix Gfx9 fast clears on srgb formats
Only MCS surfaces are affected because SRGB format are not listed as
supporting CCS compression.

Fixes CTS test :
  dEQP-VK.api.image_clearing.core.clear_color_attachment.single_layer.*_srgb_*sample_count_*
  dEQP-VK.api.image_clearing.dedicated_allocation.clear_color_attachment.single_layer.*srgb*

This is similar to what we did in Iris in f8961ea0 ("iris: Disable
sRGB fast-clears for non-0/1 values").

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10003
Fixes: 4cfb4f7d12 ("anv: support fast color clears on vkCmdClearAttachments")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29518>
2024-06-04 16:12:32 +00:00
Kevin Chuang
3349963645 anv: Properly handle cases for different query types in copy_query_results_with_shader
Like it describes in the comment section of VK_QUERY_TYPE_OCCLUSION,
only occlusion and timestamps queries needs ANV_COPY_QUERY_FLAG_PARTIAL.
VK_QUERY_TYPE_PRIMITIVES_GENERATED_EXT is captured by MI commands.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29493>
2024-06-01 13:05:48 +00:00
Lionel Landwerlin
a1ea0956b4 intel: fix HW generated local-id with indirect compute walker
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 5e7f4ff97f ("intel: Add driver support for hardware generated local invocation IDs")
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29473>
2024-05-31 08:44:22 +00:00
Yiwei Zhang
1e0b838c7b anv: use os_get_option instead of getenv
so that the queue count override logic can catch Android system
properties.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29492>
2024-05-31 07:04:07 +00:00
Jordan Justen
84216abd94 Revert "anv/grl: Set INTEL_FORCE_PROBE=* when running intel_clc"
We now use a separate code path to get devinfo for running intel_clc,
so we don't need to set the INTEL_FORCE_PROBE env-var.

This reverts commit aa152ef431.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29445>
2024-05-30 22:28:50 +00:00
José Roberto de Souza
07855b0431 intel: Compute the optimal preferred SLM size per subslice
Up to now preferred SLM size was being set to maximum preferred SLM
size for GFX 12.5 platforms and to workgroup SLM size for Xe2 but
neither of those values are the optimal.
The optimal value is:
<number of workgroups that can run per subslice> * <workgroup SLM size>

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28910>
2024-05-30 16:46:16 +00:00
José Roberto de Souza
fd368f5521 anv: Set maxComputeSharedMemorySize value for Xe2 platforms
Xe2 platforms allows for a larger compute shared memory(SLM).
For LNL this limit is 160KB but due to a workaround the limit is 128K.

BSpec: 71053
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28910>
2024-05-30 16:46:16 +00:00
José Roberto de Souza
ddda68bbf5 intel: Set preferred SLM allocation size >= than SLM size for Xe2
Xe2 has 2 requirements for preferred SLM size:
- this value needs to be >= then SLM size
- this value must be less than shared SLM/L1$ RAM in the sub-slice of platform

Also Xe2 don't have the special '0' encode that sets preferred SLM
allocation size to the maximum supported.
So here setting a value that is equal or larger than SLM size.

It was always setting SLM_ENCODES_128K for LNL A0 stepping probably
because of Wa_16018610683 but this restriction applies to all Xe2
platforms, also because of the first restriction mentioned here
this workaround is not being properly implemented, will fix that
in the next patch.

We should have a formula to calculate a preferred SLM allocation size
for gfx125 and Xe2 platfoms but until that this is enough to fix at
least the applications and tests below on LNL:
- GFXBench Aztec Ruins VK
- GravityMark VK
- Wildlife Extreme VK
- 5 crucible tests

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28910>
2024-05-30 16:46:16 +00:00
José Roberto de Souza
f5f71bae02 intel: Move slm functions from brw_compiler.h to intel_compute_slm.c/h
This functions were inlined in a header and duplicated between brw and
elk.
That would be enough reasons to move to a C file but next patches
will add more code to support Xe2 platforms, what would cause more
code to be inlined, duplicating even more code and increasing lib
size.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28910>
2024-05-30 16:46:16 +00:00
Lionel Landwerlin
fd49b815ce anv: optimize POSTSYNC_DATA rewrites in timestamp emissions
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29438>
2024-05-30 06:38:04 +00:00
Lionel Landwerlin
3984875792 u_trace: extend tracepoint end_of_pipe bit into flags
We ran into an issue with Intel drivers where it became tricky to tell
whether a timestamp must be recorded with a special end-of-pipe
compute instruction or something else.

We initially tried to deal with that internally by checking some state
in the command buffers but turns out it doesn't work.

This change adds a flag field to the tracepoint to have that
information there and the flags are passed to the record_ts vfunc.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29438>
2024-05-30 06:38:04 +00:00
Lionel Landwerlin
265b2b1255 anv: move last compute command pointers to the state structure
Makes it easier to clear.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29438>
2024-05-30 06:38:04 +00:00
Lionel Landwerlin
1d4e56d22a anv: fix timestamp copies from secondary buffers
We increased the size of the timestamps but only copied 64bit values
from the secondaries.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 521c216efc ("anv: use COMPUTE_WALKER post sync field to track compute work")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29438>
2024-05-30 06:38:04 +00:00
Lionel Landwerlin
1511b25b0f anv: fix utrace compute walker timestamp captures
The output of the POSTSYNC_DATA has to be 32-byte aligned.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 521c216efc ("anv: use COMPUTE_WALKER post sync field to track compute work")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29438>
2024-05-30 06:38:04 +00:00
Kevin Chuang
f8ccf70c99 anv: Properly fetch partial results in vkGetQueryPoolResults
Currently for an "unavailable" query, if VK_QUERY_RESULT_PARTIAL_BIT is
set, anv will return (slot.end - slot.begin). This can cause underflow
because slot.end might still be at the initial value of 0.

This commit fixes the issue by returning 0 in that situation.

Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29447>
2024-05-29 18:03:28 +00:00
Rohan Garg
309c228bb7 anv: 3D stencil surfaces have fewer layers for higher miplevels
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28646>
2024-05-29 15:50:22 +00:00
Jordan Justen
410ca6a3e9 Revert "anv: Disable Ray Tracing on xe2 until our compiler supports Xe2 RT"
This reverts commit 65684b0c7f.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29273>
2024-05-28 18:45:49 +00:00
Jordan Justen
f1b502f8c7 anv/grl: Build for xe2
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29273>
2024-05-28 18:45:49 +00:00
Jordan Justen
aa152ef431 anv/grl: Set INTEL_FORCE_PROBE=* when running intel_clc
In order to build grl, we need to get the device_info struct from the
PCI ID, but for pre-production platforms we don't want to enable them
unless INTEL_FORCE_PROBE is set.

Setting it when running intel_clc allows us to get the device_info
struct when the pre-production hardware is not ready to be enabled by
default.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29273>
2024-05-28 18:45:49 +00:00
Iván Briano
8d098ecfea anv: check cmd_buffer is on a transfer queue more properly
The queueFlags of the associated queue may have more flags than just the
type of queue it is, based on what that queue supports, like sparse or
protected content. Check that the queue is a blitter engine instead.

Fixes a bunch of dEQP-VK.api.copy_and_blit.core.*_transfer on MTL with
ANV_SPARSE=0

Fixes: 17b8b2cffd ("anv: Add support for a transfer queue on Alchemist")

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29336>
2024-05-28 18:25:16 +00:00
Rohan Garg
6fc6f95e90 intel/genxml: Update STATE_COMPUTE_MODE for Xe2
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29264>
2024-05-28 14:42:19 +00:00
Tapani Pälli
6836118cd2 anv/android: enable emulated astc for applications
This layer was blocking Android emulated ASTC support as it did not
take "emu_astc_ldr" in to account.

Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Mi, Yanfeng <yanfeng.mi@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29415>
2024-05-28 08:11:49 +00:00
José Roberto de Souza
3d2c3dc62b anv: Nuke perf_query_pass from anv_execbuf
It is set but not read.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29421>
2024-05-27 19:34:06 +00:00
Lionel Landwerlin
5f2288095b anv: fix shader identifier handling
When compilation is required, we should return
VK_PIPELINE_COMPILE_REQUIRED. The spec prevents the application from
passing a module or SPIR-V code so we have nothing to compile if the
cache lookup fails :

VUID-VkPipelineShaderStageCreateInfo-stage-06844:
   If a shader module identifier is specified for this stage, a
   VkShaderModuleCreateInfo structure must not be present in the pNext
   chain

VUID-VkPipelineShaderStageCreateInfo-stage-06848:
   If a shader module identifier is specified for this stage, module
   must be VK_NULL_HANDLE

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11208
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29340>
2024-05-23 19:05:05 +00:00
Renato Pereyra
51d6162c80 anv: Attempt to compile all pipelines even after errors
Per the Vulkan Spec section 10.1, the implementation is supposed to
attempt to create all pipelines even if creation of any one pipeline
in a create call fails. If more than one error occur, any one error
is valid as a return value.

Signed-off-by: Renato Pereyra <renatopereyra@chromium.org>
Cc: mesa-stable
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29315>
2024-05-22 17:46:34 +00:00
Lionel Landwerlin
3584fc6482 anv: use weak_ref mode for global pipeline caches
So that as soon as pipelines are freed, they're removed from the
cache.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11185
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Tested-by: Brian Paul <brian.paul@broadcom.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29283>
2024-05-22 15:22:56 +00:00
Lionel Landwerlin
a31996ce5a anv: switch to vk_device::mem_cache field for default cache
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11175
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29258>
2024-05-20 08:23:48 +00:00
Danylo Piliaiev
72326e15f3 anv: Use current_frame from vk device to delimit u_trace frames
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29220>
2024-05-16 18:12:31 +00:00
Rohan Garg
475fb68726 intel/brw: We no longer have atomic fmin/fmax ops for fp64 in xe2
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28283>
2024-05-15 17:16:51 +00:00
Rohan Garg
8d8d3666c6 intel/brw: Advertise fp64 atomic add's when we have 64 bit float support and a LSC
Rework:
 * Lionel: Simplify to just checking ver >= 20.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28283>
2024-05-15 17:16:51 +00:00
Lionel Landwerlin
0daf5e243f anv: shader printf example
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25814>
2024-05-15 13:13:38 +00:00
Lionel Landwerlin
64010716c8 anv: add debug shader printf support
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25814>
2024-05-15 13:13:38 +00:00
Lionel Landwerlin
3716bd704f anv: fix push constant subgroup_id location
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 7c76125db2 ("anv: use 2 different buffers for surfaces/samplers in descriptor sets")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25814>
2024-05-15 13:13:37 +00:00
Paulo Zanoni
e3e5f8e6db anv/sparse: assert a format can't be standard and non-standard
A format can't be standard and non-standard at the same time. If we
ever hit this assertion, it's because something behind the scenes has
evolved (such as the tiling formats) so something that was marked as
non-standard became standard. Add an assertion so we can quickly catch
these issues in the future and adjust the code.

I don't want to mix this assertion with the one in the line above
since that one is the most useful assertion we have in all the sparse
code, so it's good to know which one we're hitting.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306>
2024-05-15 08:00:16 +00:00
Paulo Zanoni
5294faee20 anv: check for VK_RENDERING_SUSPENDING_BIT once at CmdEndRendering
Most of what we do in this function is conditional to not have
VK_RENDERING_SUSPENDING_BIT, so check for it once.

Suggested-by: Iván Briano <ivan.briano@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306>
2024-05-15 08:00:16 +00:00
Paulo Zanoni
7ef3d652b2 anv/sparse: enable MSAA for Sparse when applicable
The newer platforms can't support 8x and 16x since Tile64's shape for
them is not a standard block shape (and claiming standard block shapes
is higher priority than supporting things without it). The TileYs
platforms are fine.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306>
2024-05-15 08:00:16 +00:00
Paulo Zanoni
4e5979b5a2 anv/sparse: flush the tile cache when resolving sparse images
Consider the following program:
 - Uses a multi-sampled image as the color attachment.
 - Draws simple geometry at the color attachment.
 - Uses the (non-multi-sampled) swapchain image as the resolve image.
 - Presents the result.

If the color attachment image (the multi-sampled one) is a sparse
image and it's fully bound, everything works and this patch is not
required.

If the image is partially bound (or just completely unbound), without
this patch the unbound area of the image that ends up being displayed
on the screen is not completely black, and it should be completely
black due to the fact that we claim to support
residencyNonResidentStrict (which is required by vkd3d for DX12).

On DG2, what ends up being displayed in the swapchain image is
actually the whole image as if it was completely bound. On TGL the
unbound area partially displays the geometry that was supposed to be
drawn, but the background is a different color: it's a weird corrupted
image. On both platforms the unbound areas should all be fully black.

This patch applies the proper flushing so that we get the results we
should have.

The bug fixed by this patch is not caught by dEQP or anything our CI
runs (dEQP does have some checks for residencynonResidentStrict
correctness, but none that catch this issue in particular). I was able
to catch this with my own sample program. Using INTEL_DEBUG=stall also
makes the problem go away.

If we had a way to track which images are fully bound we would be able
to avoid this flush. I had code for that in the earliest versions of
sparse before xe.ko had support for gpuva, but it requires maintaining
a bunch of lists, so I'm not sure that's actually worth it.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306>
2024-05-15 08:00:16 +00:00
Paulo Zanoni
8abfdfe576 anv/sparse: exclude Xe2's Tile64's non-standard block shapes
The Tile64 format from Xe2 is weird and some of its MSAA shapes are
non-standard. Reject them. Otherwise, we'll get dEQP failures such as:

  deqp-vk: ../../src/intel/vulkan/anv_sparse.c:829: anv_sparse_calc_image_format_properties: Assertion `is_standard || is_known_nonstandard_format' failed.

Many tests can reproduce this issue, including:

  dEQP-VK.memory.requirements.extended.image.sparse_tiling_optimal

Testcase: dEQP-VK.memory.requirements.extended.image.sparse_tiling_optimal
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306>
2024-05-15 08:00:16 +00:00
Paulo Zanoni
e69c7cd149 anv/sparse: fix block_size_B when the image is multi-sampled
This is all that's needed to make anv_sparse_bind_image_memory() work
with multi-sampled images.

The assert() we just added would have been really helpful when
debugging this.

All the dEQP tests with "sparse" in their names are passing *even*
without this patch. Real-world applications show very clear visual
corruption for sparse MSAA images bound through non-opaque binds since
only a fraction of the the actual image ends up being bound.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306>
2024-05-15 08:00:15 +00:00
Paulo Zanoni
6d748f5b2c anv/sparse: reject all sample flags that non-sparse doesn't support
We call anv_get_image_format_properties() from
anv_GetPhysicalDeviceSparseImageFormatProperties2() because we want to
reject all images that we don't support for the non-sparse case. That
function does not take sample counts as its input, it outputs a list
of possible sample counts. In this patch we check the sample counts it
outputs: if what the user is querying isn't even supported by
non-sparse, reject it right away.

That saves us from having to code in anv_sparse_image_check_support()
cases that are coded elsewhere. Examples include: 1D images and
compressed formats.

This change affects a number of dEQP tests, including:
  - dEQP-VK.api.info.sparse_image_format_properties2.1d.optimal.r4g4b4a4_unorm_pack16
  - dEQP-VK.api.info.sparse_image_format_properties2.2d.optimal.bc2_srgb_block

Without this patch, and with sparse multi-sampling enabled, this would
hit the following assertion:
  anv_formats.c:1903: anv_GetPhysicalDeviceSparseImageFormatProperties2: Assertion `false' failed.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306>
2024-05-15 08:00:15 +00:00
Paulo Zanoni
620f1d1a7a anv/sparse: properly reject sample counts we don't support
Yes, I understand that this looks like the kind of check that the
applications should be doing instead of us, but if we don't that, dEQP
will have failures. If we claim support for any multi-sampled sparse
feature, dEQP will try to create multi-sampled sparse images with all
possible sample counts, including the ones supported by non-sparse but
not supported by sparse (x8 and x16 on Tile64 platforms) and also the
ones not supported at all, like x32 and x64.

This change affects a number of dEQP tests, including:
  - dEQP-VK.api.info.sparse_image_format_properties2.2d.optimal.r32g32_sfloat

Without this patch, and with sparse multi-sampling enabled, this would
hit the following assertion:
  anv_sparse.c:866: anv_sparse_calc_image_format_properties: Assertion `is_standard || is_known_nonstandard_format' failed.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306>
2024-05-15 08:00:15 +00:00
Paulo Zanoni
af725a2ccc anv/sparse: we can't do multi-sampled depth/stencil sparse images
Our hardware has more than one layout for multi-sampled images that
use the tiling formats that give us the sparse standard block shapes:
see enum isl_msaa_layout. Only the layout we use for colored images is
compatible with the standard block shapes, so it's the only one we can
expose for multi-sampled sparse.

This change affects a number of dEQP tests, including:
  - dEQP-VK.memory.requirements.create_info.image.sparse_residency_aliased_tiling_optimal

Without this patch, and with sparse multi-sampling enabled, this test
would hit the following assertion:
  anv_sparse.c:866: anv_sparse_calc_image_format_properties: Assertion `is_standard || is_known_nonstandard_format' failed.

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306>
2024-05-15 08:00:15 +00:00