d58290270a
nvir/nir/gm107: turn on nir_lower_extract64
...
About to disable lowering for extract_byte/word in favour of a better
local implementation, but still need lowering for 64-bit versions.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377 >
2020-06-10 22:52:42 +00:00
f29e6a9e7e
nvir/nir/gm107: split nir shader compiler options from gf100
...
We can enable some more things here vs earlier GPUs.
v2:
- make use of the shared function to generate compiler options
Signed-off-by: Ben Skeggs <bskeggs@redhat.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377 >
2020-06-10 22:52:42 +00:00
5f8ddbd069
nvir/gm107: separate out header for sched data calculator
...
SM70 code emitter will want to reuse this.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377 >
2020-06-10 22:52:42 +00:00
e0379e4549
nvir/gm107: replace SHR+AND+AND with PRMT+PRMT in PFETCH lowering
...
This is more SM70-friendly.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377 >
2020-06-10 22:52:41 +00:00
4f7798be9f
nvir/gm107: implement OP_PERMT
...
PFETCH lowering will be changed to use this as it's more SM70-friendly,
and this will also allow us to implement extract_byte/word opcodes.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377 >
2020-06-10 22:52:41 +00:00
9670c087a7
nvir/nir: use nir_lower_idiv
...
NIR provides a common implementation of this so we don't need to use a
hand-written built-in library.
v2:
- use idiv_precise instead
Especially important on SM70 where we don't have an assembler.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377 >
2020-06-10 22:52:41 +00:00
59b44f90aa
nvir/nir: nir expects the shift amount to wrap, rather than clamp
...
Signed-off-by: Ben Skeggs <bskeggs@redhat.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377 >
2020-06-10 22:52:41 +00:00
126954aade
nvir/nir: implement nir_op_uror
...
Signed-off-by: Ben Skeggs <bskeggs@redhat.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377 >
2020-06-10 22:52:41 +00:00
23d56c842d
nvir/nir: implement nir_op_urol
...
Signed-off-by: Ben Skeggs <bskeggs@redhat.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377 >
2020-06-10 22:52:41 +00:00
4af791c3bd
nvir/nir: implement nir_op_extract_i16
...
v2:
- use getSSA() instead of getScratch()
v3:
- fix whitespace
Signed-off-by: Ben Skeggs <bskeggs@redhat.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377 >
2020-06-10 22:52:41 +00:00
bfdef484f5
nvir/nir: implement nir_op_extract_u16
...
v2:
- use getSSA() instead of getScratch()
v3:
- fix whitespace
Signed-off-by: Ben Skeggs <bskeggs@redhat.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377 >
2020-06-10 22:52:41 +00:00
37bef78c79
nvir/nir: implement nir_op_extract_i8
...
v2:
- use getSSA() instead of getScratch()
v3:
- fix whitespace
Signed-off-by: Ben Skeggs <bskeggs@redhat.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377 >
2020-06-10 22:52:41 +00:00
da390389d0
nvir/nir: implement nir_op_extract_u8
...
v2:
- use getSSA() instead of getScratch()
v3:
- fix whitespace
Signed-off-by: Ben Skeggs <bskeggs@redhat.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377 >
2020-06-10 22:52:41 +00:00
b80033abc6
nvir/nir: turn on lower_rotate
...
This isn't implemented, and won't be for GPUs that don't support SHF.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377 >
2020-06-10 22:52:41 +00:00
2ad6f1b7bb
nvir/nir: flesh out options
...
Signed-off-by: Ben Skeggs <bskeggs@redhat.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377 >
2020-06-10 22:52:41 +00:00
fa0a241b33
nvir/nir: move nir options to codegen
...
These seem to make more sense living with the compiler.
v2:
- use a shared function to generate the per-chipset structs
- remove nir.h include from header, not needed
Signed-off-by: Ben Skeggs <bskeggs@redhat.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377 >
2020-06-10 22:52:41 +00:00
789fa7e378
nvir/nir: fix fragment program output when using MRT
...
v2:
- use BITFIELD64_BIT()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377 >
2020-06-10 22:52:41 +00:00
ce7754e31b
nvir/nir: use component helpers instead of insn->num_components
...
We have nir_intrinsic_dest_components and nir_intrinsic_src_components
which handle all the corner cases.
Fixes a bunch of regressions like front_face stuff.
Signed-off-by: Karol Herbst <kherbst@redhat.com >
Reviewed-by: Ben Skeggs <bskeggs@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377 >
2020-06-10 22:52:41 +00:00
a2420c2280
nvir: run replaceZero() before replaceCvt()
...
replaceCvt() will miss some cases otherwise.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377 >
2020-06-10 22:52:41 +00:00
7dbb7572e2
nvir: add constant folding for OP_PERMT
...
Important for SM70 INSBF/EXTBF lowering, as these can can often be
eliminated completely.
v2:
- skip CF when subOp is set
Signed-off-by: Ben Skeggs <bskeggs@redhat.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377 >
2020-06-10 22:52:41 +00:00
a831967c72
nvir: introduce OP_FINAL
...
Required to support SM70 GS.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377 >
2020-06-10 22:52:41 +00:00
5c3040e93a
nvir: introduce OP_SGXT
...
Required for SM70 EXTBF lowering.
v2:
- added constant folding
Signed-off-by: Ben Skeggs <bskeggs@redhat.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377 >
2020-06-10 22:52:41 +00:00
6fd41da1ef
nvir: introduce OP_BMSK
...
This replaces the existing implementation without adding lowering for
earlier GPUs. The reason for this is because the existing code isn't
at all correct, and it also can't be hit anyway.
Will be required to support SM70 lowering passes.
v2:
- fixup source selection
Signed-off-by: Ben Skeggs <bskeggs@redhat.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377 >
2020-06-10 22:52:41 +00:00
e1e4d1d373
nvir: introduce OP_SHF
...
We already use a hack from NVC0LegalizeSSA::handleShift() on GK110 and
newer which encodes SHF into the existing SHL/SHR opcodes, but there's
a couple of problems with it:
- LO/HI are swapped in one of the directions, which is very confusing.
- The initial SM70 code will emit this from NIR->NVIR, and using the
existing encodings will confuse the optimisation passes.
As I want to limit the impact on other GPUs from the initial bring-up
of Volta/Turing, let's add an explicit representation of SHF in the IR.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377 >
2020-06-10 22:52:41 +00:00
60b28f7a50
nvir: introduce OP_BREV with lowering to EXTBF_REV for current GPUs
...
SM70 has this instruction, but no BFE.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377 >
2020-06-10 22:52:41 +00:00
ddedfcdf21
nvir: introduce OP_WARPSYNC
...
Will be required to support SM70.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377 >
2020-06-10 22:52:41 +00:00
4b9b7e4dd3
nvir: introduce OP_LOP3_LUT
...
Will be required to support SM70, but is also available on earlier GPUs.
v2:
- add convenience macro suggested by Karol
Signed-off-by: Ben Skeggs <bskeggs@redhat.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377 >
2020-06-10 22:52:41 +00:00
b80aff88fe
nvir: bump max encoding size of instructions
...
SM70 SASS is encoded into 16 bytes.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377 >
2020-06-10 22:52:41 +00:00
67ad75a282
gallium/hud: do not specify potentially invalid depth-range
...
Setting the depth-scale to 1 while leaving the depth-translation at 0
means our near-plane is at -1 in OpenGL semantics, which is
out-of-range on some drivers. In particular, Zink has this limitation.
But since we'll only pass a zero z in here anyway, we might as well
multiply it by zero, and get the same result. This avoids the problem.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5408 >
2020-06-10 22:27:08 +00:00
978285f69a
draw: add disk caching for draw shaders
...
This adds the cache search/insert and compile skipping for cached
objects to the VS/GS/TES/TCS stages in draw.
Reviewed-by: Roland Scheidegger <sroland@vmware.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5049 >
2020-06-11 06:05:41 +10:00
db82faff71
llvmpipe: hook draw disk cache up
...
Connect the draw callbacks into the llvmpipe code.
Reviewed-by: Roland Scheidegger <sroland@vmware.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5049 >
2020-06-11 06:05:41 +10:00
e07e5137b0
draw: add disk cache callbacks for draw shaders
...
This provides a set of hooks from the driver that draw can
use to access the disk cache for the draw shaders.
Reviewed-by: Roland Scheidegger <sroland@vmware.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5049 >
2020-06-11 06:05:41 +10:00
c2864081e1
llvmpipe/cs: add shader caching
...
As for fragment shader, skip compilation step if we have the shaders
Reviewed-by: Roland Scheidegger <sroland@vmware.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5049 >
2020-06-11 06:05:40 +10:00
f0d91c9af3
llvmpipe/fs: add caching support
...
Serialize and check if the object is in the cache, it there is
a cached object skip compilation code once we've constructed
the function interface.
Reviewed-by: Roland Scheidegger <sroland@vmware.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5049 >
2020-06-11 06:05:40 +10:00
1b2e345110
gallivm: don't cache shaders that use fetch functions.
...
This needs to be reworked, but it's a bit messy as we have to store
all the fetch pointers to be added as globals later once gallivm
has been initialised further. For now just refuse to cache shaders
that hit these paths (mainly ETC1 and BPTC).
Reviewed-by: Roland Scheidegger <sroland@vmware.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5049 >
2020-06-11 06:05:40 +10:00
6c0c61cb48
llvmpipe: add infrastructure for disk cache support
...
This hooks up the gallium API and adds the APIs needed
for shader stages to search and add things to the cache.
It also adds cache stats debug printing.
Reviewed-by: Roland Scheidegger <sroland@vmware.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5049 >
2020-06-11 06:05:40 +10:00
4962d3e107
gallivm: add cache interface to mcjit
...
MCJIT uses an ObjectCache object to implement the cache,
this creates and instances of it and adds it to the MCJIT
instances, it stores the cached object for later use by
the outer layers.
Reviewed-by: Roland Scheidegger <sroland@vmware.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5049 >
2020-06-11 06:05:40 +10:00
b15ecb1717
gallivm: skip operations if we have a cached object.
...
If the object is loaded from the cache, a bunch of gallivm/llvm
interactions can be skipped.
Reviewed-by: Roland Scheidegger <sroland@vmware.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5049 >
2020-06-11 06:05:40 +10:00
7b7c02d161
gallivm: add support for a cache object
...
This plumbs the cache object into the gallivm API, nothing uses
it yet.
Reviewed-by: Roland Scheidegger <sroland@vmware.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5049 >
2020-06-11 06:05:40 +10:00
333ee94285
gallivm: rework debug printf hook to use global mapping.
...
Cached shaders require relinking, so hardcoding the pointer
can't work. This switches out the printf code to use new
proper API.
Reviewed-by: Roland Scheidegger <sroland@vmware.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5049 >
2020-06-11 06:05:40 +10:00
f511d2a553
gallivm: rework coroutine malloc/free callouts.
...
When using cached shaders we have to relink the shader with
external symbols when it's loaded. However the way gallivm does
function calls now hardcodes the function pointer into the shader.
LLVM had a mechanism for doing this properly using global mappings,
this switches the coroutine alloc/free code to use a global mapping.
Reviewed-by: Roland Scheidegger <sroland@vmware.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5049 >
2020-06-11 06:05:40 +10:00
d815d74f75
llvmpipe/draw: drop variant number from function names.
...
When we use an object cache for the MCJIT we can have identical
cache entries from the same shader variant in different shaders,
but the JIT objcache uses the function name to relink things,
so it has to be consistent. Just drop the variants from the
function names.
Note the modules still have the variant info.
Reviewed-by: Roland Scheidegger <sroland@vmware.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5049 >
2020-06-11 06:05:40 +10:00
e639e311a1
llvmpipe/cs: overhaul cs variant key state.
...
This just realigns it with the fs state, and fixes some issues
where shaders weren't getting cached correctly.
Reviewed-by: Roland Scheidegger <sroland@vmware.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5049 >
2020-06-11 06:05:28 +10:00
8735e96c53
util/disk_cache: add fallback for disk_cache_get_function_identifier
...
Otherwise drivers need to have a ifdef on windows, easier to fix
here hopefully.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5049 >
2020-06-11 06:05:28 +10:00
456e8103ef
ci: fix possible spuriously run of jobs
...
Need to list arm_test-base here as well, or jobs using this
template may spuriously run if the arm_test-base job fails or
is cancelled.
Suggested-by: Michel Dänzer <mdaenzer@redhat.com >
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com >
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com >
Reviewed-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5405 >
2020-06-10 16:13:50 +00:00
bd553f0546
ac/surface: cache DCC retile maps (v2)
...
This reduces overhead when resizing windows or when allocating
similar image sizes over and over again.
v2: optimize the memory footprint of the cache
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5398 >
2020-06-10 15:35:46 +00:00
4cf674c8f7
ac/surface: add a wrapper structure to hold ADDR_HANDLE
...
and more things in the future.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5398 >
2020-06-10 15:35:46 +00:00
e6996d6fbd
amd/addrlib: remove unused members of ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5398 >
2020-06-10 15:35:46 +00:00
a99f4d5382
amd/addrlib: don't recompute DCC info for every ComputeDccAddrFromCoord call
...
This decreases the DCC retile map overhead from 23% to 18%.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5398 >
2020-06-10 15:35:46 +00:00
a1b9eb62f6
ac/surface: don't recompute the DCC retile map for imported textures
...
The retile map is not used in this case, and the retile map computation
takes 39% of CPU time when resizing a window.
This brings it down to 23%.
The dcc_retile_use_uint16 setting has to be derived from DCC sizes.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5398 >
2020-06-10 15:35:46 +00:00
Ben Skeggs