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824 Commits

Author SHA1 Message Date
Felix DeGrood
49f34675f3 anv: set CFE_STATE.OverDispatchControl to default 
BSpec specifies default value for CFE_STATE.OverDispatchControl
is 2, or 50% overdispatch. No observed performance impact.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22179>
 2023-03-31 14:18:59 +00:00
Felix DeGrood
ecb709c853 anv: only emit CFE_STATE when scratch space increases 
On Gen12.5+, we only need to emit CFE_STATE when scratch space
has changed, not on every pipeline binding. Also, only grow the
scratch space, never shrink it. Need to reset after secondary buf.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22179>
 2023-03-31 14:18:58 +00:00
Lionel Landwerlin
c88de6c18c anv: move queue check helpers to anv_private 
Also fix missing trace point stuff in command buffer begin/end

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22179>
 2023-03-31 14:18:58 +00:00
Felix DeGrood
97e64aef60 anv: cs_stall during compute state flush on < gen12.5 
The CS Stall in cmd_buffer_flush_compute_state is only required
on HW that uses MEDIA_VFE_STATE, gen12 and previous.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22179>
 2023-03-31 14:18:58 +00:00
Lionel Landwerlin
763854f7e3 anv: implement recommended flush/wait of AUX-TT invalidation 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22183>
 2023-03-29 13:18:49 +00:00
Mark Janes
a2e5e7daa0 intel: use generated helpers for Wa_1409433168/Wa_16011107343 
HSD 1306463417 is a hardware defect.  The originating software
workaround for the issue is Wa_1409433168.  Convert all references to
the software workaround number, and use generated helpers instead of
GFX comparisons.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21914>
 2023-03-15 23:31:08 +00:00
Rohan Garg
becc1c5615 anv: break out of the loop when the first color attachment is found 
Fixes: 2bd304bc ("anv: Skip the RT flush when doing depth-only rendering")
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21903>
 2023-03-15 10:52:50 +00:00
Mark Janes
4978db6b9e intel: use generated workaround helpers for Wa_1409600907 
Wa_1409600907 was enabled for gen12+.  It should not be applied for
platforms after gen12.0.  Use generated helpers to ensure application
to all relevant platforms.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21743>
 2023-03-09 22:56:51 +00:00
Lionel Landwerlin
11bc2bde83 anv: force MEDIA_INTERFACE_DESCRIPTOR_LOAD reemit after 3D->GPGPU switch 
Seems to fix a hang in the following titles :
   - Age of Empire 4
   - Monster Hunter Rise

where the HW is hung on a PIPE_CONTROL after a GPGPU_WALKER but no
MEDIA_INTERFACE_DESCRIPTOR_LOAD was emitted since the switch from 3D
to GPGPU.

This would happen in the following case :

   vkCmdBindPipeline(COMPUTE, cs_pipeline);
   vkCmdDispatch(...);
   vkCmdBindPipeline(GRAPHICS, gfx_pipeline);
   vkCmdDraw(...);
   vkCmdDispatch(...);

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17247>
 2023-03-08 23:09:36 +00:00
Lionel Landwerlin
1d9cf8f381 anv: add gfx9 generated draw support 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>
 2023-03-03 11:30:54 +00:00
Lionel Landwerlin
a2026bf5f9 anv: rename generated draws for Gfx11 
We'll need different shaders for Gfx9

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>
 2023-03-03 11:30:54 +00:00
Lionel Landwerlin
caf2389bc5 anv: use a single generation shader for indirect draws 
The indirect draw count shader can be used as a more generic case of
the indirect draw one. We'll never enter the last condition of the
shader (writing the MI_BATCH_BUFFER_START) with non count variants of
draws.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>
 2023-03-03 11:30:54 +00:00
Lionel Landwerlin
e68615aeaa anv: fix indirect draws VF cache tracking of index buffer 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: e2dc32d755 ("anv: move functions around to plan for generated draws")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>
 2023-03-03 11:30:54 +00:00
Lionel Landwerlin
6ee7a2ecfa anv: pull Wa_14016118574 out of some loop not changing state 
The WA is meant to be here to apply some state that is not propagated
properly inside the HW. But if you have a loop like :

for ( ... ) {
  emit(3DPRIMITIVE, some param);
}

You're not really changing any state, just push more draws into the
pipeline.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: f2645229c2 ("anv: implement Wa_14016118574")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21660>
 2023-03-03 09:34:16 +00:00
Lionel Landwerlin
d82e8e01c8 anv: fixup condition for Wa_14016118574 
We don't want the WA to kick-in if it's not point/line topology.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: f2645229c2 ("anv: implement Wa_14016118574")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21660>
 2023-03-03 09:34:16 +00:00
Lionel Landwerlin
3cd72a2840 anv: fixup Wa_16011107343 for Gfx12 only 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 75968398f3 ("anv: emit 3DSTATE_HS for each primitive on gfx12")
Acked-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21605>
 2023-02-28 23:03:21 +00:00
Marcin Ślusarz
e74a3284f5 anv: halve the push constants space in mesh pipelines 
It's only used by fragment shaders, so halving it matches the size
used in the most optimal primitive pipeline (VS + FS).

This change frees some URB space for mesh and task shaders and as
a result improves vk_meshlet_cadscene performance by up to 2%,
depending on the model.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21559>
 2023-02-28 20:18:01 +00:00
Tapani Pälli
75968398f3 anv: emit 3DSTATE_HS for each primitive on gfx12 
This is Wa_16011107343, same workaround as commit 880a3efe6c
but for gfx12.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21551>
 2023-02-28 08:07:01 +00:00
Emma Anholt
2bd304bc8f anv: Skip the RT flush when doing depth-only rendering. 
The spec citation says it's just for when the RT write message BTI might
point to a different RT, and if we don't have any color attachments then
we won't have one of those at all.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21508>
 2023-02-27 21:44:56 +00:00
Sviatoslav Peleshko
07b57deea2 anv: Move WA MEDIA_VFE_STATE after stalling PIPE_CONTROL 
Fixes: bc612536 ("anv: Emit a dummy MEDIA_VFE_STATE before switching from GPGPU to 3D")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6172
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21472>
 2023-02-24 10:08:43 +00:00
Tapani Pälli
880a3efe6c anv: implement emission of 3DSTATE_HS for Wa_1306463417 
We need to emit 3DSTATE_HS for each primitive with tessellation.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21308>
 2023-02-23 19:30:03 +00:00
Tapani Pälli
f8a1100ca1 anv: limit generated draws to pipelines without HS stage 
This is done for gfx11 specific workaround.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21308>
 2023-02-23 19:30:03 +00:00
Tapani Pälli
2028f1caa3 anv: emit 3DSTATE_HS in cmd_buffer_flush_gfx_state 
Patch packs 3DSTATE_HS state during pipeline creation but it
gets emitted only before 3DPRIMITIVE. We will later need this
to implement a workaround.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21308>
 2023-02-23 19:30:03 +00:00
Lionel Landwerlin
ce68824bdf anv: fix invalid masking of 48bit address 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 4d05be49c2 ("anv: implement vkCmdTraceRaysIndirect2KHR")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21486>
 2023-02-23 15:02:45 +00:00
Emma Anholt
4cd7976208 anv: Fix gfx8/9 VB range > 32bits workaround detection. 
Since the dirty range started out as 0..0, you would have 0..VBend as the
new dirty range on the first draw, and if your VB was >32b then you'd
flush every time you used it.  Instead, if there's no existing dirty range
then just set it to our new VB's range.

Perf results with zink+anv on my CFL:

sauerbraten:       +24.8182% +/- 0.602077% (n=5)
portal-2-v2.trace: +4.64289% +/- 0.285285% (n=5)

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21370>
 2023-02-18 07:25:47 +00:00
Constantine Shablya
5053527806 anv: use Vulkan runtime's robust buffer access 
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21338>
 2023-02-15 16:46:59 +00:00
Mark Janes
4b97e349cd intel: Implement Wa_16011448509 
"Use 3DSTATE_CONST command for individual shaders instead of
3DSTATE_CONST_ALL COMMAND"

On gen 12.0 platforms, 3DSTATE_CONSTANT_ALL command is not processed
correctly in certain cases.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21301>
 2023-02-15 01:10:42 +00:00
Rohan Garg
5bb217a07a anv: drop unused headers 
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21283>
 2023-02-14 16:55:21 +00:00
Lionel Landwerlin
9ddd296cd3 anv: implement VK_EXT_vertex_input_dynamic_state 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21026>
 2023-02-14 09:05:35 +00:00
Dave Airlie
056b0cb87f anv: add video engine support in various places 
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20782>
 2023-02-08 02:56:28 +00:00
Lionel Landwerlin
e37f458207 intel/ds: track end of pipe bits 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21094>
 2023-02-06 09:12:18 +00:00
Lionel Landwerlin
a242500eb4 anv: rename a few internal functions to highlight gfx use 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21094>
 2023-02-06 09:12:18 +00:00
Tapani Pälli
6bdc29e2e6 intel: enable existing workaround for ICL platform 
Patch changes comment to refer to the lineage 14014097488, this
workaround applies for ICL as well.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20952>
 2023-02-01 11:09:19 +00:00
Lionel Landwerlin
0d7f8aa249 anv: fix null descriptors 
When writing descriptor with a null buffer/image we expect that
writing 0 will point to the null surface. For that to work the null
surface has to be in the bindless surface heap.

This fixes some new failures in dEQP-VK.robustness.* tests once
rewritten from the NV_ray_tracing to KHR_ray_tracing extension.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 4ceaed7839 ("anv: split internal surface states from descriptors")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7762
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20953>
 2023-01-27 21:38:32 +00:00
Kenneth Graunke
a8108f1d44 anv: Add missing untyped data port flush on PIPELINE_SELECT 
See the comments in emit_apply_pipe_flushes().  Flushing HDC is not
sufficient in GPGPU mode, and we need to set the untyped data port flush
bit as well.

Fixes many dEQP-VK failures with INTEL_COMPUTE_CLASS=1 on Alchemist.

Fixes: 1067ec90a5 ("anv: Update PIPELINE_CONTROL flush when switching pipeline mode in TGL+")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20774>
 2023-01-25 07:08:55 +00:00
Tapani Pälli
9b37ef40f8 anv: add restrictions for 3DSTATE_RASTER::AntiAliasingEnable 
Field must be disabled if any render targets have integer
format, additionally for Gfx12+ field must be disabled when
num multisamples > 1 or forced multisample count > 1.

Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20671>
 2023-01-20 12:50:04 +00:00
Lionel Landwerlin
9a16effeac anv: record secondaries' traces into primaries 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16655>
 2023-01-13 01:22:15 +00:00
Lionel Landwerlin
2d627f28c8 anv: use the null surface with unused push descriptor binding table entries 
Some binding table entries have been identify as unused in the shaders
by the push constant analysis pass. We can just put the null entry in
there.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: b49b18f0b7 ("anv: reduce BT emissions & surface state writes with push descriptors")
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20555>
 2023-01-09 23:00:24 +00:00
José Roberto de Souza
1067ec90a5 anv: Update PIPELINE_CONTROL flush when switching pipeline mode in TGL+ 
This 2 PIPELINE_CONTROL flushes are not necessary for TGL and newer
and also it have different requirements of flush, so here doing
this two changes at the same time.

As no ANV_PIPE_INVALIDATE_BITS is set as parameter of
anv_add_pending_pipe_bits(),
genX(cmd_buffer_apply_pipe_flushes)(cmd_buffer) will only emit one
PIPELINE_CONTROL.

BSpec: 44505
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20501>
 2023-01-09 14:40:26 +00:00
Rohan Garg
85650297d2 anv,hasvk: move the null check into the function call and drop null check copies 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20104>
 2023-01-06 17:22:16 +00:00
Rohan Garg
0ae23b81a4 anv: Drop useless FIXME 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20104>
 2023-01-06 17:22:16 +00:00
Rohan Garg
05dca17b57 anv,hasvk: migrate to ROUND_DOWN_TO from util 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20104>
 2023-01-06 17:22:16 +00:00
Rohan Garg
818eed3d2f anv,hasvk: migrate to u_minify from util 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20104>
 2023-01-06 17:22:16 +00:00
Rohan Garg
4504188508 anv,hasvk: migrate to align64 from util 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20104>
 2023-01-06 17:22:16 +00:00
Rohan Garg
a06f751ec8 anv,hasvk: migrate align32 to the right functions from util 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20104>
 2023-01-06 17:22:16 +00:00
Rohan Garg
1e9fb7c696 anv,hasvk: Use the inbuilt macro from src/util for clamping int64_t 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20104>
 2023-01-06 17:22:15 +00:00
Rohan Garg
0030d6d224 anv: constify variables and use early returns 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20104>
 2023-01-06 17:22:15 +00:00
Felix DeGrood
7f6beb8537 anv: Emit CS stall on INTEL_MEASURE timestamp 
For INTEL_MEASURE, ensure all prior instructions completed before
timestamp taken. Continue to support no CS flush case for Perfetto.
CS stall was dropped from pipecontrol when adding u_trace support.

Fixes: cc5843a573 ("anv: implement u_trace support")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20502>
 2023-01-04 22:43:36 +00:00
Tapani Pälli
97f2b60833 anv: implement Wa_14015814527 for task shaders 
After using task shader, we need to emit a zero URB state and a
nullprim (empty pipe control) before rendering with primitives.

After this, a normal URB state needs to be returned, this will
happen when pipeline batch is emitted during pipeline switch.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20334>
 2023-01-03 12:44:08 +00:00
José Roberto de Souza
c6d1f76da2 anv: Add and use emit_pipeline_select() 
To avoid the replication of code to properly emit PIPELINE_SELECT.

init_compute_queue_state() had a different emit of PIPELINE_SELECT but
as there is no compute engine in GFX VER 11 we are safe with the
differences.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20444>
 2022-12-29 08:34:15 -08:00