AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
168,506 Commits 1 Branch 0 Tags
415b824bc6dc8f0fce517f8fa1e38df94de15502
Commit Graph

168506 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Marcin Ślusarz 15afb8dcc6 intel/compiler/mesh: apply URB payload mask once per program 
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21098>
 2023-02-21 11:10:23 +00:00
Daniel Schürmann 93a47bab04 nir: simplify nir_block_cf_tree_{next|prev} 
Removes some case distinction by first checking if this is
the first/last block of a cf_node.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13962>
 2023-02-21 10:41:11 +00:00
Daniel Schürmann 2e394b5cc1 nir/lower_continue_targets: only repair SSA when necessary 
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13962>
 2023-02-21 10:41:11 +00:00
Daniel Schürmann 7fba5abfd7 nir/lower_continue_constructs: special-case Continue Constructs with zero or one predecessors 
If a loop has only a single continue, the control flow is already
converged and we can inline the continue construct.
If a loop has no continue statement at all, the Continue Construct
is unreachable and can simply be deleted.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13962>
 2023-02-21 10:41:11 +00:00
Daniel Schürmann f42eb71df9 spirv: use Loop Continue Construct to emit SPIR-V loops and lower after parsing 
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13962>
 2023-02-21 10:41:11 +00:00
Daniel Schürmann c20751d61d nir: add lowering for Loop Continue Constructs 
This pass lowers Loop Continue Constructs to the previous solution
by inserting it at the beginning of the loop:

loop {
   if (i != 0) {
      continue construct
   }
   loop body
}

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13962>
 2023-02-21 10:41:11 +00:00
Daniel Schürmann 312510448f nir: create nir_push_continue() and related helpers 
nir_control_flow.h:
  void nir_loop_add_continue_construct(nir_loop *loop);
  void nir_loop_remove_continue_construct(nir_loop *loop);

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13962>
 2023-02-21 10:41:11 +00:00
Daniel Schürmann 2bb369dd8d nir: add assertions that loops don't have a Continue Construct 
Hoping that I didn't miss any, this *should* add assertions
to all functions and passes which explicitly handle 'nir_loop'.

Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13962>
 2023-02-21 10:41:11 +00:00
Daniel Schürmann d4b97bf3fa nir: add Continue Construct to nir_loop 
The added continue_list corresponds to the SPIR-V
Continue Construct and serves as a converged control-flow
construct and is executed after each continue statement
and before the next iteration of the loop body.

Also adds validation rules for loops with Continue Construct

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13962>
 2023-02-21 10:41:11 +00:00
Caio Oliveira e0c6ad1ce5 glsl: Account for unsized arrays in NIR linker 
Follow the same approach as the pre-NIR linker.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5891
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21401>
 2023-02-21 09:08:18 +00:00
Gert Wollny 10f8240caf zink/kopper: Add extra swapchain images for Venus 
Together with the previous patch that corrects the number of
swapchain images on Xwayland this gives Zink/Venus a spead
boost in a number of work loads and close the gap or even
surpass VirGL when the benchmark is not GPU bound.
Some numbers:

 zink (Virtio-GPU Venus (Host: RADV RENOIR)) / VirGL

 Benchmark                   VirGL    baseline  Zink/Venus +1
                                                and Xwayland +1
    ==================================================================
    OpenArena (FPS)            63.8     60.1     148.5
    Unigine Sancuary (FPS)    129.1    121.4     164.7
    Unigine Tropics (FPS)     107.2     85.7     114.3
    Unigine Heaven (FPS)       48.5     48.0      51.5
    Unigine Valley (FPS)       48.0     45.6      47.4
    Xonotic (FPS)              90.5     59.4      89.2
    GpuTest/Volcano (Points)   2960     2966      3013

  zink (Virtio-GPU Venus (Host: Intel Xe TGL GT2)) / VirGL

 Benchmark                   VirGL    baseline  Zink/Venus +1
                                                and Xwayland +1
    ===========================================================
    OpenArena (FPS)          95.1       59.8        78.9
    Unigine Sancuary (FPS)   85.5       76.6        81.8
    Unigine Tropics (FPS)    66.0       59.8        62.7
    Unigine Heaven (FPS)     28.8       28.7        28.0
    Unigine Valley (FPS)     29.0       28.0        27.0
    Xonotic (FPS)            64.2       49.4        51.1
    GpuTest/Volcano (Points) 2855       2718        2747

v2: Fix limiting minImageCount (Mike)

Signed-off-by: Gert Wollny <gert.wollny@collabora.co.uk>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21136>
 2023-02-21 08:43:30 +00:00
Gert Wollny 04d654a5d0 vulkan/wsi: Take Xwayland into account for x11_min_image_count 
For wayland we report a minimum of four swapchain images, so for
Xwayland we should report the same.

v2: Fix typo (Eric)
v3: Make that four images on Xwayland (Daniel)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21136>
 2023-02-21 08:43:30 +00:00
Alyssa Rosenzweig 23ec0d6bb2 asahi: Make shader-db work again 
We need a nontrivial blend state otherwise the whole frag shader is optimized
out.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21432>
 2023-02-21 08:24:58 +00:00
Alyssa Rosenzweig 029c686c6d asahi: Implement color masks with masked stores 
Blend states can require masking colour. Currently, this is handled by
nir_lower_blend, which lowers masks to a read-modify-write operation as required
on Mali hardware. However, our "tilebuffer store" instruction supports a write
mask, allowing us to write only a subset of channels to the tilebuffer. It's
more efficient to use that than to emit pointless tilebuffer loads.

Note that even without tilebuffer loads, non-opaque masks don't work with opaque
pass types.  Here, we handle this with a translucent pass type, which gets HSR
to do the right thing and is consistent with the pass type used previously.
However, it's a bit heavy handed -- Apple manages to use an opaque pass type
with masking but with some unknown HSR fields twiddled. IMO reverse-engineering
those details shouldn't block this because this gets us closer to optimal (just
not all the way there) and is strictly better than what we had before.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21431>
 2023-02-21 08:10:15 +00:00
Alyssa Rosenzweig 3084e6e689 agx: Add agx_internal_format_supports_mask helper 
Not all formats can be masked, add a query to check which can be.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21431>
 2023-02-21 08:10:15 +00:00
Alyssa Rosenzweig 5e031867fe agx: Handle ssa_undef as zero 
Masked stores may result in undefs after optimization. Rather than call
lower_undef_to_zero late (but get no benefit), we may as well handle ourselves
to prepare for proper undef support down the line.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21431>
 2023-02-21 08:10:15 +00:00
Alyssa Rosenzweig eab4d6a96f agx: Add and use agx_nir_ssa_index helper 
Common subexpression that we'll repeat once more in the next patch.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21431>
 2023-02-21 08:10:15 +00:00
Samuel Pitoiset ad459054ed radv: enable SQTT tracing on GFX11 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20338>
 2023-02-21 07:28:49 +00:00
Samuel Pitoiset dfa9b5d624 radv: disable SPM counters with RGP on GFX11 
They are likely different and perfcounters aren't defined on GFX11 yet.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20338>
 2023-02-21 07:28:49 +00:00
Samuel Pitoiset 5fe48baad6 radv: implement a workaround for SQTT on GFX11 
Found in AMDVLK, see the comment below for an explanation.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20338>
 2023-02-21 07:28:49 +00:00
Samuel Pitoiset 826ae89ba6 radv: make sure to wait for the trace buffer also on GFX11 
Otherwise, we might get incomplete data.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20338>
 2023-02-21 07:28:49 +00:00
Samuel Pitoiset c2bc4aff54 radv: only enable SQTT for SE0 on GFX11 
For weird reasons, the hardware doesn't return any data for other SEs.
RadeonSI is also affected by the same issue, enable only SE0 for now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20338>
 2023-02-21 07:28:49 +00:00
Samuel Pitoiset ad4ad2ba84 radv: configure SQ_THREAD_TRACE_CTRL.REG_AT_HWM on GFX11 
AMDVLK sets this to 2 when the always stall mode is enabled, which is
the default in RADV.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20338>
 2023-02-21 07:28:49 +00:00
Jan Beich 8bc78e8eb9 util/u_process: implement util_get_command_line for BSDs 
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21052>
 2023-02-20 21:26:49 +00:00
Pierre-Eric Pelloux-Prayer 923758a5c2 winsys/amdgpu: use amdgpu_device_get_fd 
If radv is initialized before radeonsi, doing:

   aws->fd = fd;

is incorrect because the device was initialized using the fd
passed by radv.

libdrm has a helper to query the fd used to create the device,
so use it.

We also need to init the kms_handles table in this case
because we're going to share BOs between radeonsi's fd and
the device fd.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3424
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20983>
 2023-02-20 20:38:17 +00:00
Amber 919c5568bf freedreno: check for conditional rendering in launch_grid 
fixes: KHR-GL45.compute_shader.conditional-dispatching

Signed-off-by: Amber Amber <amber@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21428>
 2023-02-20 19:03:25 +00:00
Alyssa Rosenzweig e93a221024 agx: Handle group_memory_barrier 
A combination of control_barrier + memory_barrier but it's always seen with
those. This would be safer with scoped barriers...

Fixes dEQP-GLES31.functional.synchronization.inter_invocation.ssbo

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21326>
 2023-02-20 18:50:40 +00:00
Alyssa Rosenzweig e9cec96633 agx: Implement b2b32 
Shows up with store_shared.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21326>
 2023-02-20 18:50:40 +00:00
Alyssa Rosenzweig 955797bb00 agx: Pack local atomics 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21326>
 2023-02-20 18:50:39 +00:00
Alyssa Rosenzweig 14f546726e agx: Lower shared memory offsets to 16-bit 
Per the hardware requirement. This simplifies instruction selection (it avoids
the need to constant fold u2u16 in the backend).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21326>
 2023-02-20 18:50:39 +00:00
Alyssa Rosenzweig a21f6f8cb0 agx: Translate load/store_shared 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21326>
 2023-02-20 18:50:39 +00:00
Alyssa Rosenzweig f8b9dfbbad agx: Translate NIR atomics 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21326>
 2023-02-20 18:50:39 +00:00
Alyssa Rosenzweig 2a021b1818 agx: Pack local load/store instructions 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21326>
 2023-02-20 18:50:39 +00:00
Alyssa Rosenzweig 96904f83b4 agx: Pack global atomics 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21326>
 2023-02-20 18:50:39 +00:00
Alyssa Rosenzweig eea3674f36 agx: Disallow immediate bases to device_load 
Lina pointed this out in review.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21326>
 2023-02-20 18:50:39 +00:00
Alyssa Rosenzweig 6b0ef2b462 agx: Model local loads/stores 
Aka shared memory or threadgroup memory.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21326>
 2023-02-20 18:50:39 +00:00
Alyssa Rosenzweig 0d07d27173 agx: Model atomic instructions 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21326>
 2023-02-20 18:50:39 +00:00
José Roberto de Souza ec7584130f iris: Export num_fences() 
This function will be needed by i915 and Xe backends.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21389>
 2023-02-20 18:29:47 +00:00
José Roberto de Souza 780dd291c5 iris: Export update_batch_syncobjs() 
This function will be needed by i915 and Xe backends.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21389>
 2023-02-20 18:29:47 +00:00
José Roberto de Souza 102e180d0f iris: Export batch debug functions 
Those function will be called by different backends, so exporting it.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21389>
 2023-02-20 18:29:47 +00:00
Alyssa Rosenzweig 9e67d3f237 asahi: Advertise ARB_texture_barrier 
We already implement it.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21264>
 2023-02-20 17:27:21 +00:00
Alyssa Rosenzweig 5f8a59ac89 asahi: Advertise ARB_derivative_control 
Our native fddx instruction is already fine, so it's fine to use it for both
fddx_coarse and fddx_fine. We handle both of those cases already so the
extension is trivial.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21264>
 2023-02-20 17:27:21 +00:00
Alyssa Rosenzweig c6c61d052e docs/features: Sync Asahi with reality 
A few features were either missed in the original patch or have since been
added, update features.txt to light up more green on the mesa matrix.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21264>
 2023-02-20 17:27:21 +00:00
Alyssa Rosenzweig cf96edff1c agx: Implement gathers (nir_texop_tg4) 
Passes dEQP-GLES31.functional.texture.gather.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21264>
 2023-02-20 17:27:21 +00:00
Alyssa Rosenzweig 978d3fefa8 agx: Model and pack gathers 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21264>
 2023-02-20 17:27:21 +00:00
Alyssa Rosenzweig 8dc861dbb5 agx: Lower offsets in NIR 
Rather than the backend. This way we can handle non-constant offsets as well as
constants with a single code path (with the constant offset code subsumed as a
special case via NIR's constant folding). This nets us dynamic offset support.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21264>
 2023-02-20 17:27:21 +00:00
David Heidelberg a5dfee1c22 ci: revert download of git cache to the wget 
At this point of CI there is not curl available.

Fixes: 796686af1b ("ci: migrate from wget to curl")

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21414>
 2023-02-20 13:48:32 +00:00
Simon Perretta 44f40ff941 pvr: Use descriptor/set/table offsets from driver 
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Co-Authored-By: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Acked-by Frank Binns <frank.binns@imgtec.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21331>
 2023-02-20 13:34:03 +00:00
Simon Perretta e64288a0ba pvr: Split pvr_private.h 
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by Frank Binns <frank.binns@imgtec.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21331>
 2023-02-20 13:34:03 +00:00
Simon Perretta 5694755fa0 pvr: Load descriptors from memory 
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by Frank Binns <frank.binns@imgtec.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21331>
 2023-02-20 13:34:03 +00:00