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Author SHA1 Message Date
Jesse Natalie d6dea13231 microsoft/compiler: When packing fractional inputs, find a row with space for it 
Enables vertex attributes to overlap (as GL requires) when using
enhanced layouts with explicit component packing.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26156>
 2023-11-14 00:18:52 +00:00
Jesse Natalie d7bc277726 microsoft/compiler: Don't use 64-bit types for signature entries 
HLSL can't declare these, and the DXIL accesses them as i32 anyway.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26156>
 2023-11-14 00:18:52 +00:00
Jesse Natalie 2334ff67b7 microsoft/compiler: Don't declare PS output registers split across variables 
DXIL doesn't support that. Color targets need to be float4s.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26156>
 2023-11-14 00:18:52 +00:00
Jesse Natalie adc7caa3ec microsoft/compiler: Bump signature limits for 32 rows of 4 components 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26156>
 2023-11-14 00:18:52 +00:00
Sagar Ghuge ee48b12a8f anv: Avoid emitting PIPE_CONTROL command for copy/video queue 
Avoid emitting PIPE_CONTROL instruction since Copy/Video doesn't support
it.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26121>
 2023-11-13 23:43:27 +00:00
Sagar Ghuge 8c9a7f7730 anv: Write timestamp using MI_FLUSH_DW on blitter 
On Blitter engine, we don't support PIPE_CONTROL, we have to update
memory locations using the MI_FLUSH_DW command.

v2:
- Handle video queue (Lionel)

Fixes: 056b0cb87f ("anv: add video engine support in various places")
Fixes: 5112b42146 ("anv: Handle end of pipe with MI_FLUSH_DW on transfer queue")

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26121>
 2023-11-13 23:43:27 +00:00
Caio Oliveira dcb68de656 intel/compiler: Clear up block instructions before re-adding them 
Avoids fixing up list pointers that we don't care about anymore -- since
all the instructions will be re-added in a different order anyway.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25841>
 2023-11-13 23:05:47 +00:00
Caio Oliveira a9f95bf687 intel/compiler: Reuse same scheduler for all pre-RA scheduling modes 
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25841>
 2023-11-13 23:05:47 +00:00
Caio Oliveira 0dd5378ffe intel/compiler: Make scheduler classes take an external mem_ctx 
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25841>
 2023-11-13 23:05:47 +00:00
Caio Oliveira 04aa2df461 intel/compiler: Separate schedule_node temporary data 
Some fields in schedule_node will need to be reset each time they are
used.  The `cand_generation` needs to be back to zero, and both
`unblocked_time` and `parent_count` need to be back to their initial
values, which were pre-calculated.

Rename the initial data fields and add new ones for the temporary data.

Note the helper function is `per node` to allow it "tag along" with an
existing loops.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25841>
 2023-11-13 23:05:47 +00:00
Caio Oliveira 81594d0db1 intel/compiler: Move earlier scheduler code that is not mode-specific 
This will be useful later on when we reuse the same scheduler for
multiple modes.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25841>
 2023-11-13 23:05:47 +00:00
Caio Oliveira 73d4e4118a intel/compiler: Tidy up code in scheduler related to reads_remaining 
- Just assert in functions we expect it to exist
- Predicate usage with `!post_reg_alloc` to avoid suggest there are more
  combinations.
- Reuse an existing loop to call the count function.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25841>
 2023-11-13 23:05:47 +00:00
Caio Oliveira 4f246cf4e7 intel/compiler: Merge child/latency arrays in schedule_node 
Values are used together, saves one pointer in schedule_node,
reduces amount of reallocations when children count grows.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25841>
 2023-11-13 23:05:47 +00:00
Caio Oliveira e59a054203 intel/compiler: Move FS specific fields to fs_instruction_scheduler 
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25841>
 2023-11-13 23:05:47 +00:00
Caio Oliveira a6297d05ca intel/compiler: Remove virtual calls from scheduler 
Pull run() and schedule_instructions() for fs, and pull a very
simplified version of those into a run() for vec4.  Because of the
previous patches the duplication is small.

Since we are touching these, change run() implementations to use the
cfg from the existing reference to the visitor/shader instead of taking
one as argument.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25841>
 2023-11-13 23:05:47 +00:00
Caio Oliveira d76d58cf50 intel/compiler: Cache issue_time information 
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25841>
 2023-11-13 23:05:47 +00:00
Caio Oliveira ecd7ffcf78 intel/compiler: Extract scheduling related basic functions 
Those will be used in multiple places later.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25841>
 2023-11-13 23:05:47 +00:00
Caio Oliveira 8a8dd2db0c intel/compiler: Add only available instructions to scheduling list 
The list was used for iterating through all instructions and then
later also to track the available ones.  Now that the array iteration
is used, change how we fill it and rename it to reflect its only job.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25841>
 2023-11-13 23:05:47 +00:00
Caio Oliveira ddff6428c5 intel/compiler: Use array to iterate the scheduler nodes 
For all the preparation data collection before the scheduling
actually happens, it is possible to walk the schedule nodes
in order by iterating on the range of the array dedicated to
a given block.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25841>
 2023-11-13 23:05:47 +00:00
Caio Oliveira fe6ac5a184 intel/compiler: Allocate all schedule_nodes at once 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25841>
 2023-11-13 23:05:47 +00:00
Caio Oliveira be012055da intel/compiler: Remove reference to brw_isa_info from schedule_node 
It is always the same for all nodes, so use the one available in the
scheduler itself.

Also, per Matt's suggestion, collect is_haswell from devinfo instead of
from a function argument.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25841>
 2023-11-13 23:05:47 +00:00
Caio Oliveira 6987571737 intel/compiler: Use linear allocator in parts of brw_schedule_instructions 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25841>
 2023-11-13 23:05:47 +00:00
Friedrich Vock 61203f6078 radv/ci: Update skips comments 
dEQP-VK.api.device_init.create_instance_device_intentional_alloc_fail.basic
doesn't fail anymore, but it takes nearly 5 minutes to run, so keep
skipping it.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26164>
 2023-11-13 20:09:31 +00:00
Friedrich Vock 8ffdad731c vulkan: Don't use set_foreach_remove when destroying pipeline caches 
set_foreach_remove assumes no entries have been removed. That assumption
only holds if no errors occur, since pipeline cache objects can get
removed if an error occurs during deserialization.

This fixes
dEQP-VK.api.device_init.create_instance_device_intentional_alloc_fail.basic
crashing on RADV.

Cc: mesa-stable
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26164>
 2023-11-13 20:09:31 +00:00
Eric Engestrom 1cb3c349ff bin/gitlab_gql: give a better name to the --print-job-manifest argument value than PRINT_JOB_MANIFEST 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26143>
 2023-11-13 20:03:44 +00:00
Eric Engestrom 22961fc45a bin/gitlab_gql: deduplicate fetch_merged_yaml() logic between print branches 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26143>
 2023-11-13 20:03:44 +00:00
Eric Engestrom ef63cc6017 bin/gitlab_gql: rename get_job_final_definition() to print_...() since that's what it actually does 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26143>
 2023-11-13 20:03:44 +00:00
Eric Engestrom c6ef161bc1 bin/gitlab_gql: only allow a single --print-* argument per invocation 
Printing multiple things as the same time is not really usable, so let's
be explicit and only allow one at a time, which allows a few cleanups in
the code.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26143>
 2023-11-13 20:03:44 +00:00
José Roberto de Souza 08f851f436 anv: Bring back the non optimized version of build_load_render_surface_state_address() 
Commit 50c29e1ffa ("anv: simplify buffer address+size loads from descriptor buffer")
is making use of AuxiliarySurfaceBaseAddress field to store buffer
lenght as it was not used but a LNL workaround will make use of it
so we need to bring back this non optimized version of
build_load_render_surface_state_address().

There is some conflicts so a simple revert do not works.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26152>
 2023-11-13 18:11:39 +00:00
Eric Engestrom c5ccd55a8e v3d/ci: add new failures 
Possibly a regression from 56451ce773 ("v3d: Don't implicitly
clear the content of the imported buffer"), but not bisected to confirm.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26176>
 2023-11-13 16:10:41 +00:00
Ruijing Dong 8e03c18914 frontends/va: add intra-refresh in VAAPI interface 
Row and column modes are enabled, not the mixed mode,
application should have a logic of sending a period
of intra-refresh sequence to complete the intra-refresh
cycle.

Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26133>
 2023-11-13 14:29:40 +00:00
Ruijing Dong 7fae1c46ad radonesi/vcn: enable intra-refresh in vcn encoders 
Enable intra-fresh in vcn encoders and support avc/hevc/av1 codecs.
Just if B frames is enabled or the number of temporal layers is
larger than 1, intra-refresh will be disabled, because it doesn't
support intra-refresh on B frames, and on sub-temporal layers.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26133>
 2023-11-13 14:29:40 +00:00
Ruijing Dong 5524faa22c radeonsi/vcn: change intra-ref name 
1. change structure name from intra-ref to intra-refresh
2. add need_sequence_header variable
3. add intra-refresh cap enum

Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26133>
 2023-11-13 14:29:40 +00:00
Ruijing Dong 66c75b0ca2 radeonsi/vcn: preparation for enc intra-refresh 
This is a prepration for adding intra-refresh
in vcn encoders. Intra-refresh is a feature for
smoothing out fluctuation in bitrate by replacing
a whole intra frame by several intra strips distributed
in several continous frames, it is also used in
suppressing error propagation situation.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26133>
 2023-11-13 14:29:40 +00:00
Hans-Kristian Arntzen f69863fd5a radv/radeonsi: Forward correct GPU instance to umr. 
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24578>
 2023-11-13 13:37:27 +00:00
Rhys Perry fd80140723 radv: set prolog as_ls if has_ls_vgpr_init_bug=true 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26111>
 2023-11-13 12:09:55 +00:00
Rhys Perry b70c235e4a aco: skip LS VGPR initialization bug workaround if the prolog exists 
Otherwise, we would do this twice.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26111>
 2023-11-13 12:09:55 +00:00
Rhys Perry 967c52097e aco: workaround LS VGPR initialization bug in RADV prologs 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26111>
 2023-11-13 12:09:53 +00:00
Tatsuyuki Ishi ad4b82e192 radv: Pre-mask misaligned_mask for VS prolog. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26023>
 2023-11-13 11:47:42 +00:00
Tatsuyuki Ishi 55d21f2f12 radv, aco: Inline struct aco_vs_input_state. 
Now that we no longer use the radv_vs_input_state pointer, we can simply
inline all the state-related fields.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26023>
 2023-11-13 11:47:42 +00:00
Tatsuyuki Ishi 3fc3a94bce radv, aco: Rework VS prolog key handling. 
The main change is to use struct radv_vs_prolog_key directly instead of
the compressed representation to simplify an upcoming rework in prolog /
epilog caching. In doing so the state struct pointer was replaced with
an inline struct.

Care was also taken to pre-mask all the states with the active attribute
mask and other masks when it makes sense; this ensures that we don't
accidentally use information not hashed into the key during compilation.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26023>
 2023-11-13 11:47:42 +00:00
Tatsuyuki Ishi 5cc7f54f15 radv: Remove last VS prolog reuse logic. 
This was broken as the field was never assigned to. This will also be
dropped from the upcoming prolog/epilog lookup rework, as it adds to
code complexity while the benefit of saving one hash table memory access
seems questionable.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26023>
 2023-11-13 11:47:41 +00:00
Tatsuyuki Ishi d8a5b76307 aco: Replace aco_vs_input_state.divisors with bitfields. 
Instead of concrete divisor value, we only pass down the information
whether the divisor is zero or nontrivial (>1).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26023>
 2023-11-13 11:47:41 +00:00
Samuel Pitoiset 9b840df9f6 radv: add drirc options to force re-compilation of shaders when needed 
On Steam Deck, shaders are pre-compiled for better performance (less
stuttering, less CPU usage, etc). But when a compiler fix needs to be
backported, there is currently no way to handle this properly.

This introduces 3 drirc options
radv_override_{graphics,compute,ray_tracing}_shader_version in order to
force the driver to re-compile pipelines when needed. By default, the
shader version is 0 for all pipelines.

When one drirc is set for a specific game, RADV will re-compile all
pipelines only once with the compiler fix included (because the
pipeline key would be different).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26094>
 2023-11-13 10:47:26 +00:00
Mary Guillemard fe159c85de zink: Check for VK_EXT_extended_dynamic_state3 before setting A2C 
Fix crashes for piglit alpha-to-coverage tests when
VK_EXT_extended_dynamic_state3 is not supported (like on Venus)

Fixes: 736577871b ("zink: check for cbuf0 writes before setting A2C")

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26003>
 2023-11-13 10:18:54 +00:00
Samuel Pitoiset 88cbe32048 radv: add support for RGP queue events 
This can be used for analysing queue submissions.

This is still experimental and it can be disabled with
RADV_THREAD_TRACE_QUEUE_EVENT=false if you have issues with it.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22779>
 2023-11-13 08:53:10 +00:00
Samuel Pitoiset 33f4307796 radv: add radv_write_timestamp() helper 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22779>
 2023-11-13 08:53:10 +00:00
Samuel Pitoiset aa75538674 ac/rgp: update dumping queue event records to the capture 
GPU timestamps are emitted by the GPU to a BO with CPU-access which
means the driver needs to read them back when the submission is done.

Fix this by passing a pointer to that BO, like some other records.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22779>
 2023-11-13 08:53:09 +00:00
Samuel Pitoiset 661d28cfec radv: restore sampling CPU/GPU clocks before starting SQTT trace 
This was removed by mistake in "radv/rgp: Use common trace trigger"
and it introduced a regression with RGP queue events.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22779>
 2023-11-13 08:53:09 +00:00
Samuel Pitoiset 55e48d7e0f radv: enable DGC preprocessing when all push constants are inlined 
It's not possible when they aren't all inlined because they need to be
copied to the upload BO and the DGC shader also copies the ones that
come from the indirect layout.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25935>
 2023-11-13 08:28:53 +00:00