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159301 Commits

Author SHA1 Message Date
Dmitry Osipenko 2d3c1707fa iris/bufmgr: Use intel_ioctl() helper for GEM_SET_TILING 
Replace opencoded ioctl() usage with a common intel_ioctl() helper.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23399>
 2023-06-02 20:09:24 +00:00
David Heidelberg 5140ff1948 ci: rename x86 and amd64 to x86_64, armhf to arm32, and i386 to x86_32 
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8049

Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23282>
 2023-06-02 21:30:15 +02:00
Jesse Natalie 653a374126 dzn: Fix incremental binding of VBs 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23403>
 2023-06-02 18:22:24 +00:00
Jesse Natalie fb722ca6ff dzn: Don't create D3D objects for secondary command buffers 
We emulate secondary command buffers via record/replay, we don't
need actual D3D objects, and having them can cause debug layer errors
due to getting out of sync with the state of the Vulkan object.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23403>
 2023-06-02 18:22:23 +00:00
Zhang, Jianxun ec9efee907 anv: Remove alignment to aux ratio on size of main surface 
The existing 4KB alignment is sufficient for both 1MB and
64KB alignment requirements of CCS buffer.

Signed-off-by: Zhang, Jianxun <jianxun.zhang@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23002>
 2023-06-02 16:50:32 +00:00
Zhang, Jianxun d2b6f16145 anv: Support 1MB AUX mapping (MTL) 
Replace the hardcoded 64KB granularity with a value
provided by AUX module that returns either 64KB(TGL)
or 1MB(MTL) of the running system.

Signed-off-by: Zhang, Jianxun <jianxun.zhang@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23002>
 2023-06-02 16:50:32 +00:00
Mark Janes a98f246857 isl: use generated workaround helpers for Wa_1806565034 
This workaround was enabled for gen12+, but only applies to gen12.0.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21912>
 2023-06-02 16:17:34 +00:00
Karol Herbst 3a5a7203af rusticl/device: set preferred vector size of doubles if fp64 is enabled 
Fixes: 400847a990 ("rusticl/device: improve advertisement of fp64 support")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23391>
 2023-06-02 15:00:01 +00:00
Matt Coster d1b17a5edc pvr: Implement ZLS subtile alignment 
This is a workaround for the edge case where a depth buffer is smaller
than a single tile size.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23313>
 2023-06-02 14:43:24 +00:00
Matt Coster 620e7d4cf2 pvr: Rename ds_{image,iview} in pvr_gfx_sub_cmd_job_init() 
The added prefix makes it clear we're referencing the depth/stencil
attachment.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23313>
 2023-06-02 14:43:24 +00:00
Matt Coster fa8667b728 pvr: Publicise some static functions from pvr_blit.c 
These will be used to implement ZLS subtile alignment. One function
that was already public has also had its declaration moved from
pvr_private.h to the newly created pvr_blit.h.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23313>
 2023-06-02 14:43:24 +00:00
Matt Coster c31998b7d3 pvr: Add pvr_image_view_get_image() 
This replaces the pattern of vk_to_pvr_image(iview->vk.image).

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23313>
 2023-06-02 14:43:24 +00:00
Matt Coster 675aa18d4d pvr: Cleanup in pvr_process_cmd_buffer() 
Renaming all barrier structs allows the pvr_process_event_cmd_barrier()
calls to be placed on a single line.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23313>
 2023-06-02 14:43:24 +00:00
Matt Coster 8dbf9932a9 pvr: Add wait_on_previous_transfer flag to graphics subcommand 
This inserts a barrier before the fragment job to wait on the previous
transfer job.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23313>
 2023-06-02 14:43:24 +00:00
Matt Coster 40ce383554 pvr: Use pvr_sub_cmd_event union members directly 
This has the benefit of replacing some explicit asserts with static type
checking.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23313>
 2023-06-02 14:43:24 +00:00
Matt Coster f63f4fac0a pvr: Move pvr_get_isp_num_tiles_xy() to rogue_hw_utils.h 
Rename s/pvr/rogue/ to match the other functions in that file.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23313>
 2023-06-02 14:43:24 +00:00
Konstantin Seurer 46cd332c36 radv/rt: Fix pipeline libraries 
This was completely broken, because radv_create_group_handles would
access OOB stages.

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23128>
 2023-06-02 14:19:37 +00:00
Matt Coster b5ac476b98 pvr: Fix segfault in pvr_physical_device_init() 
This was introduced (by me) in a previous commit. Part of pdevice->vk
was initialised before calling vk_physical_device_init() which then
overwrite our values.

Fixes: 4ba553ab9a ("pvr: Use common vkGetPhysicalDeviceFeatures2() implementation")

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23366>
 2023-06-02 14:03:28 +00:00
Samuel Pitoiset 84f2d26509 nir: print locations for per-vertex fragment shader inputs 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23254>
 2023-06-02 13:25:43 +00:00
Samuel Pitoiset 7b213254c9 nir/lower_io: add nir_intrinsic_load_input_vertex to is_input() 
To add the const offset to the base index.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23254>
 2023-06-02 13:25:43 +00:00
Samuel Pitoiset 72955540cc spirv,nir: add support for SpvDecorationPerVertexKHR 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23254>
 2023-06-02 13:25:43 +00:00
Samuel Pitoiset c2ec23ab84 spirv,nir: add support for BaryCoord{NoPersp}KHR builtins 
This introduces new intrinsics nir_intrinsic_load_barycentric_coord_xxx
with 3-components instead of expanding the existing ones that are
supposed to interpolate input varyings, while BaryCoord is a sysval
on most hardware.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23254>
 2023-06-02 13:25:43 +00:00
Samuel Pitoiset c49a052cbf spirv: add support for SpvCapabilityFragmentBarycentricKHR 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23254>
 2023-06-02 13:25:43 +00:00
Erik Faye-Lund adbd362421 zink: update profiles schema 
The 0.8.1-251 release has shipped, which contains the latest bits we
need in order to be clean here. Let's bump the bumpbump-bump.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23342>
 2023-06-02 13:01:23 +00:00
Mike Blumenkrantz 501f78b268 draw: add (disabled) vertex dumping for non-linear emit 
matches linear path

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23368>
 2023-06-02 12:32:23 +00:00
Mike Blumenkrantz b45594f4ff lavapipe: don't pass indirect info in streamout draws 
this is otherwise broken for a sequence like draw_indirect -> draw_indirect_bc

cc: mesa-stable

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23368>
 2023-06-02 12:32:23 +00:00
Mike Blumenkrantz 13af5dda97 lavapipe: stop setting patch vertices constantly 
this pollutes gallium traces and makes debugging more annoying

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23368>
 2023-06-02 12:32:23 +00:00
Mike Blumenkrantz f75da8f2f0 lavapipe: bump max push constant size 
this matches vkd3d-proton requirements

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23368>
 2023-06-02 12:32:23 +00:00
Mike Blumenkrantz cc9e958053 lavapipe: fix DS3 min sample setting 
if a DS3 pipeline enabling dynamic samples is not bound when samples
are set dynamically, then such a pipeline is later bound, min samples
would have been incorrectly set to 1

instead, flag the update for later and do it just before draw

cc: mesa-stable

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23368>
 2023-06-02 12:32:23 +00:00
Tatsuyuki Ishi 5a85c4432c radv: Guard against misplaced RGP barrier markers. 
RGP will crash if we emit a layout transition marker outside a barrier.
If this happens, trigger an assertion if its enabled or silently discard
the marker otherwise to avoid traces that cannot be opened.

Also, guard against attempts to start barrier markers recursively, since
this will corrupt the internal start/end matching.

Closes: <https://gitlab.freedesktop.org/mesa/mesa/-/issues/7971>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21033>
 2023-06-02 11:55:03 +00:00
Tatsuyuki Ishi 7c48e886ec radv: Add RGP barrier markers for render pass transition and copy. 
This allows them to be attributed to the correct event instead of being
blend to the previous barrier.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21033>
 2023-06-02 11:55:03 +00:00
Qiang Yu f6c5133074 radeonsi: enable aco for mono standalone vs 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
 2023-06-02 17:51:23 +08:00
Qiang Yu 8db2d6181b ac/llvm: remove unused barrier implementation 
memory buffer barrier is still used when nir lowering, will
be removed later.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
 2023-06-02 17:51:20 +08:00
Qiang Yu 2d1859b01e radeonsi: always use scoped barrier 
aco has removed non-scoped barrier support.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
 2023-06-02 17:51:16 +08:00
Qiang Yu 90b56e99f4 radeonsi: use nir_umul_high for fast udiv 
nir has dedicated alu op for it. Also for removing int64
multiply which aco does not support.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
 2023-06-02 17:51:13 +08:00
Qiang Yu 95ff215be2 radeonsi: calculate needed lds size when upload raw binary for vs 
ELF do the same when upload binary. We can't do this when
compile, because it's know when draw time in radeonsi.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
 2023-06-02 17:51:09 +08:00
Qiang Yu 142485ff64 radeonsi: fill aco shader info for mono standalone vs 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
 2023-06-02 17:51:06 +08:00
Qiang Yu 5351209632 nir,ac/llvm,radeonsi: replace nir_buffer_atomic_add_amd with ssbo atomic 
Now that radeonsi support pass desc to ssbo atomic ops,
we can use ssbo atomic instead. aco does not implement
nir_buffer_atomic_add either.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
 2023-06-02 17:51:02 +08:00
Qiang Yu d39fd98a47 ac/llvm,radeonsi: lower nir_load_ring_esgs_amd in abi 
It's not implemented by aco. So move the code from llvm
to nir.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
 2023-06-02 17:50:58 +08:00
Qiang Yu b21098779d ac/llvm,radeonsi: lower nir_load_ordered_id_amd in abi 
aco does not implement it.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
 2023-06-02 17:50:55 +08:00
Qiang Yu 19d9bca39e ac/llvm,radeonsi: lower nir_load_packed_passthrough_primitive_amd in abi 
aco does not implement it.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
 2023-06-02 17:50:52 +08:00
Qiang Yu bbcb02fac4 ac/llvm,radeonsi: lower nir_load_initial_edgeflags_amd in abi 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
 2023-06-02 17:50:49 +08:00
Qiang Yu dc07743106 ac/llvm,radeonsi: lower load_workgroup_num_input_(vertices|primitives) in abi 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
 2023-06-02 17:50:46 +08:00
Qiang Yu c8680f1f90 ac/llvm,radeonsi: lower nir_load_merged_wave_info_amd in abi 
aco does not implement it.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
 2023-06-02 17:50:42 +08:00
Qiang Yu 327e35f667 ac/llvm,radeonsi: lower nir_load_gs_vertex_offset_amd in abi 
aco does not implement this.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
 2023-06-02 17:50:38 +08:00
Qiang Yu a27058e8ea radeonsi: add scratch offset vs args explicitly for aco 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
 2023-06-02 17:50:34 +08:00
Qiang Yu 7445101fdd radeonsi: resolve lds ngg aco symbols 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
 2023-06-02 17:50:22 +08:00
Qiang Yu 2d0e8e0258 aco: use ac_get_image_dim for array check when image intrinsic 
This is to avoid missing array flag when <=GFX8 and 3D image
in which case is treated as 2D array image.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23094>
 2023-06-02 09:21:59 +00:00
Qiang Yu ed97cd92dc aco: implement nir_bindless_image_fragment_mask_load_amd 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Sigend-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23094>
 2023-06-02 09:21:59 +00:00
Qiang Yu 50f9d644e8 aco: implement nir_xfb_counter_sub_amd 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23094>
 2023-06-02 09:21:59 +00:00