2d0f49534f
pvr: Restrict argument to dev_info where possible.
...
Avoid passing whole device structure. In most of the cases
we only need dev_info from device pointer to check for
features and ERNs.
This commits simply avoids the need to carry device pointer
where ever we go.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com >
Reviewed-by: Frank Binns <frank.binns@imgtec.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16897 >
2022-06-07 14:55:10 +01:00
4b6c18fea8
pvr: Fix ISP_RENDER_MODE_TYPE enum in rogue_cr.xml
...
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com >
Reviewed-by: Frank Binns <frank.binns@imgtec.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16897 >
2022-06-07 14:55:10 +01:00
11d8973efb
pvr: Add transfer 3d parameter heap support.
...
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com >
Reviewed-by: Frank Binns <frank.binns@imgtec.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16897 >
2022-06-07 14:55:10 +01:00
0c3c1a8be4
pvr: Remove vk_format_is_pure_integer and use common helper.
...
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com >
Reviewed-by: Frank Binns <frank.binns@imgtec.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16897 >
2022-06-07 14:55:10 +01:00
72c634fb23
pvr: Allow signal_sync pointer to be NULL in job submission.
...
This allows the common driver to pass NULL signal_sync for cases
where there are multiple jobs (of the same type) to be processed.
In that case, it's useless to maintain the signal_syncs other than
the one returned by the last submission.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com >
Reviewed-by: Frank Binns <frank.binns@imgtec.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16897 >
2022-06-07 14:55:10 +01:00
ce36859b95
pvr: Add support for R32G32B32A32_UINT, R32_UINT and R8_UINT formats.
...
These formats are required by vkCmdCopyBuffer implementation. The
formats in pvr_format_table are exposed to applications as well.
Given these formats are supported for rendering and sampling, there
shouldn't be a problem exposing these to applications.
Co-authored-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com >
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com >
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com >
Reviewed-by: Frank Binns <frank.binns@imgtec.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16897 >
2022-06-07 14:55:10 +01:00
86f703e7b1
pvr: Pass device info struct in pds generator.
...
Fixes a potential NULL pointer dereference.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com >
Reviewed-by: Frank Binns <frank.binns@imgtec.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16897 >
2022-06-07 14:55:10 +01:00
b24216c52d
radv: Fix the accel struct size calculation
...
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16874 >
2022-06-07 12:26:02 +00:00
062b5a9ba1
ac: use ResetAllOptionOccurrences instead of ResetCommandLineParser
...
Fixes -amdgpu-atomic-optimizations=true option.
From CommandLine.h:
/// Reset all command line options to a state that looks as if they have
/// never appeared on the command line. This is useful for being able to parse
/// a command line multiple times (especially useful for writing tests).
void ResetAllOptionOccurrences();
/// Reset the command line parser back to its initial state. This
/// removes
/// all options, categories, and subcommands and returns the parser to a state
/// where no options are supported.
void ResetCommandLineParser();
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Fixes: 7e2874dc93https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16850 >
2022-06-07 10:29:56 +00:00
2c70b1a217
v3d: release all color buffers on context destroy
...
All of them must be released on context destroy, and not only the first
one.
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16903 >
2022-06-07 10:05:55 +00:00
8381f64251
intel: Fix build of mi_builder_tests by including c99_compat.h
...
We need this so C++ will understand "restrict" which is used in the
genxml output.
Fixes: 9f717b5f23jordan.l.justen@intel.com >
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16899 >
2022-06-07 08:27:19 +00:00
c06b265ec7
dzn: Emit missing transition barriers for rendering attachments
...
VkRenderingAttachmentInitialLayoutInfoMESA provides information about
the initialLayout -> currentLayout that's expected when we begin a
render pass. Let's take it into account.
Fixes: 2d0798440berik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16792 >
2022-06-07 08:15:25 +00:00
f06da59fd7
radv: report the marketing name as part of the device name
...
This now reports something like "AMD Radeon RX 5700 XT (RADV NAVI10)".
This introduces a new variable for storing the marketing name because
the existing device name is used by the shaders cache and must remain
the same to avoid any issues with precompilation.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4802
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11027 >
2022-06-07 07:48:07 +00:00
42b3735716
radv/winsys: add get_chip_name() to the null winsys
...
Make it return "Null hardware", this is just for RADV_FORCE_FAMILY.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11027 >
2022-06-07 07:48:07 +00:00
ad8f9d5d58
gallium: rename PIPE_CAP_MAX_SHADER_BUFFER_SIZE -> *_UINT
...
to imply the maximum of 4GB - 1.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16881 >
2022-06-07 00:17:58 -04:00
fd6b8999d7
gallium: rename PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE->MAX_TEXEL_BUFFER_ELEMENTS_UINT
...
to allow exposing 4G - 1. The "SIZE" was also a misnomer because it meant
elements. This no longer clamps the size to INT_MAX in st/mesa.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16881 >
2022-06-07 00:17:58 -04:00
dc4a3a18e9
gallium: add PIPE_CAP_MAX_CONSTANT_BUFFER_SIZE_UINT for UBOs
...
We plan to report UINT32_MAX for UBOs.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16881 >
2022-06-07 00:17:57 -04:00
406cf871b2
gallium: rename PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE to *_BUFFER0_*
...
UBOs will use a larger limit.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16881 >
2022-06-07 00:17:57 -04:00
2a151238a0
st/mesa: round down MaxUniformBlockSize to a multiple of 4 for piglit
...
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16881 >
2022-06-07 00:17:57 -04:00
0081925856
st/mesa: limit MaxComputeWorkGroupCount to INT_MAX - 1 due to failing tests
...
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16881 >
2022-06-07 00:17:57 -04:00
9c7256fb8d
mesa: change GL_MAX_SHADER_STORAGE_BLOCK_SIZE to UINT
...
so that we can report 4G - 1.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16881 >
2022-06-07 00:17:57 -04:00
939d2e0860
mesa: change GL_MAX_TEXTURE_BUFFER_SIZE to UINT
...
so that we can report 4G - 1.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16881 >
2022-06-07 00:17:57 -04:00
eaac8a1986
mesa: change GL_MAX_UNIFORM_BLOCK_SIZE to UINT
...
to allow 4GB - 1.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16881 >
2022-06-07 00:17:57 -04:00
e76d5c7bc5
mesa: change GL_MAX_COMPUTE_WORK_GROUP_COUNT to UINT
...
AMD wants to report UINT32_MAX here.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16881 >
2022-06-07 00:17:57 -04:00
c1381daab8
mesa: clamp UINT values greater than INT_MAX for glGetInteger
...
so that values greater than INT_MAX report INT_MAX with glGetInteger and
the full value with glGetInteger64. This allows exposing compute grid sizes
and max buffer sizes greater than INT_MAX.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16881 >
2022-06-07 00:17:57 -04:00
7acc91fe87
mesa/st: use util_streaming_load_memcpy for compute pbo copying
...
Reviewed-by: Emma Anholt <emma@anholt.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16732 >
2022-06-07 03:33:20 +00:00
a7831c5f6e
streaming-memcpy: move to src/util/ and compile unconditionally
...
this is useful, so make it available for general use
Reviewed-by: Emma Anholt <emma@anholt.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16732 >
2022-06-07 03:33:20 +00:00
c370fa362b
mesa/streaming-memcpy: add memcpy fallback
...
this makes it more compatible and able to be used from the caller without ifdefs
Reviewed-by: Emma Anholt <emma@anholt.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16732 >
2022-06-07 03:33:20 +00:00
03e8908e27
ci/crocus: Drop g41's xfail for rgba_half_float_oes.
...
Something fixed it recently, noticed when I was testing this MR and ran
manual jobs.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16823 >
2022-06-07 02:38:42 +00:00
ab3a1d41c5
glsl: Drop INT_DIV_TO_MUL_RCP lowering.
...
nir_lower_int_to_float() does this at the end of compilation, no need to
do it up front.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16823 >
2022-06-07 02:38:42 +00:00
5ec0301ec7
lima: Lower nir_op_idiv with other scalar math operations.
...
This will end up appearing in the backend once we move GLSL's
idiv->fmul+frcp lowering to NIR.
Reviewed-by: Emma Anholt <emma@anholt.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16823 >
2022-06-07 02:38:42 +00:00
5c499d6d1a
nir: Fix idiv lowering on !NativeIntegers when lower_fdiv is also set.
...
Avoids a regression when turning off GLSL's int div lowering.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16823 >
2022-06-07 02:38:42 +00:00
464b32c030
glsl: Drop the div-to-mul-rcp lowering for floats.
...
NIR has fdiv, and all the NIR backends have to have lower_fdiv set
appropriately already since various passes (format conversions,
tgsi_to_nir, nir_fast_normalize(), etc.) might generate one.
This causes softpipe and llvmpipe to now do actual divides, since
lower_fdiv is not set there. Note that llvmpipe's rcp implementation is a
divide of 1.0 by x, so now we're going to be just doing div(x, y) instead
of mul(x, div(1.0, y)).
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16823 >
2022-06-07 02:38:42 +00:00
594d3982f7
tgsi_exec: Fix inf/nan handling for divide by zero.
...
For RCP and for DDIV, we do division without any src1 != 0 checks, and we
should do the same here so that we get infs or nans as appropriate instead
of undefined.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16823 >
2022-06-07 02:38:42 +00:00
0fbd1b1f4c
glsl: Move exp/log-to-exp2/log2 lowering to glsl-to-NIR.
...
It's way more concise to write as nir_builder calls.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16823 >
2022-06-07 02:38:42 +00:00
d024eb6fab
glsl: Remove stale lower_instructions comments.
...
Should have been in 3a42e92a4falyssa.rosenzweig@collabora.com >
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16823 >
2022-06-07 02:38:42 +00:00
8c4b88ee48
gallium+glsl: Remove EmitNoSat/PIPE_CAP_VERTEX_SHADER_SATURATE
...
The drivers not setting it were:
- nv30, which gets lowering using NIR's lower_fsat flag.
- r300, which gets lowering using NIR's lower_fsat flag.
- a2xx, which has was getting it optimized back to fsat anyway.
This drops the check for the cap from gallium nine. While nine does have
a non-nir path, I think it's safe to assume that if you have SM3
texturing, you can do fsat.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16823 >
2022-06-07 02:38:42 +00:00
7a8e3c80fd
nouveau/nv30: Make sure fsat is lowered in the VS.
...
GLSL lowers fsat to clamps based on PIPE_CAP_VERTEX_SHADER_SATURATE
(EmitNoSat), but nir is happy to optimize that back to fsat unless you
tell it not to.
Noticed by inspection while looking at deleting EmitNoSat.
Fixes: ca1ec72726alyssa.rosenzweig@collabora.com >
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16823 >
2022-06-07 02:38:42 +00:00
61c500ee9b
radeonsi: replace llvm ls/hs interface lds ops with nir lowered ones
...
Use ac nir lower pass to generate these lds load/store ops explicitly.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Signed-off-by: Qiang Yu <yuq825@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16418 >
2022-06-07 01:40:14 +00:00
f7f2770e72
ac/nir: Add remappability to tess and ESGS I/O lowering passes.
...
This will be used for radeonsi to map common I/O location to fixed
slots agreed by different shader stages.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16418 >
2022-06-07 01:40:14 +00:00
666dbbf1a3
ac/nir: skip gl_Layer/gl_ViewportIndex write for LS
...
This is from radeonsi.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Signed-off-by: Qiang Yu <yuq825@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16418 >
2022-06-07 01:40:14 +00:00
87dfff3e6b
radeonsi: add tcs_vgpr_only_inputs parameter to si_get_nir_shader
...
Will be used later.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Signed-off-by: Qiang Yu <yuq825@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16418 >
2022-06-07 01:40:14 +00:00
47dd3525fb
radeonsi: implement load_lshs_vertex_stride abi
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Signed-off-by: Qiang Yu <yuq825@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16418 >
2022-06-07 01:40:14 +00:00
6a95452ddf
ac/nir: use nir_intrinsic_load_lshs_vertex_stride_amd
...
For radeonsi which pass this value by argument.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Signed-off-by: Qiang Yu <yuq825@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16418 >
2022-06-07 01:40:14 +00:00
33b4b923ee
nir: add nir_intrinsic_load_lshs_vertex_stride_amd
...
For loading LS-HS vertex stride by shader argument in radeonsi.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Signed-off-by: Qiang Yu <yuq825@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16418 >
2022-06-07 01:40:14 +00:00
e35ff669b5
ac/llvm: get back nir_intrinsic_load_tess_rel_patch_id_amd
...
radeonsi will use it. This can be removed again after radeonsi support
radv_nir_lower_abi like lower pass.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Signed-off-by: Qiang Yu <yuq825@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16418 >
2022-06-07 01:40:13 +00:00
4237932685
glsl: tidy up link_varyings_and_uniforms()
...
All uniform linking is now done via nir based linker not via this
code so we drop that from its name. We also drop a bunch of unused
parameters.
Reviewed-by: Emma Anholt <emma@anholt.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16880 >
2022-06-07 01:11:19 +00:00
f00be793e4
glsl: drop extra optimise swizzles call
...
As per the comment this was meant to tidy things up after varying
linking but varying linking has been moved into a nir based linker
so this extra call is no longer needed.
This optimisation pass is still called in the regular glsl ir
optimisation loop.
No shader-db change on Iris (BDW).
Reviewed-by: Emma Anholt <emma@anholt.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16880 >
2022-06-07 01:11:19 +00:00
7af5929b54
turnip: Move tile loads back into the draw CS.
...
Now that we don't need to know if HW binning actually will get used or
not, we can just emit the tile loads into the start of the draw CS.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16826 >
2022-06-07 00:00:28 +00:00
ecabd3b5a9
turnip: Allow nested CP_COND_REG_EXEC
...
This ends up being needed for moving tile loads into the draw cs.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16826 >
2022-06-07 00:00:28 +00:00
Rajnesh Kanwal