Commit Graph

167392 Commits

Author SHA1 Message Date
Chia-I Wu 2533d0a0e2 radv: fix image view extent override for astc
When doing ASTC decoding, the image has format VK_FORMAT_ASTC_*, the
internal plane 1 has format VK_FORMAT_R8G8B8A8_UNORM, and the view has
format VK_FORMAT_R8G8B8A8_UINT.  It does not need the override for
compressed formats.

Fixes: f97b449e9e ("radv: integrate meta astc compute decoder to radv")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26106>
2023-11-15 20:29:03 +00:00
Lionel Landwerlin 295734bf88 intel/fs: fix residency handling on Xe2
We're missing a few reg_unit() scaling when dealing with residency data.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26208>
2023-11-15 20:06:12 +00:00
Faith Ekstrand 0bd23d6263 nak: Enable SM70 for Volta
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26212>
2023-11-15 13:38:04 -06:00
Tapani Pälli 01046cd6ad anv/drirc: add option to disable FCV optimization
There are rendering issues with FCV on DG2 and Unreal engine 5.1,
patch adds option to disable fcv in drirc.

Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26169>
2023-11-15 18:16:56 +00:00
M Henning aedf9113c4 nak: Set "evict first" from ACCESS_NON_TEMPORAL
This matches the way ptxas sets this hint.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26201>
2023-11-15 17:48:29 +00:00
M Henning adc3fd4c99 nak: Add encodings for cache eviction priorities
We were previously setting "evict first" everywhere, which could
possibly be a perf issue on machines that are also running shaders
compiled with codegen, which sets "evict normal" on everything.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26201>
2023-11-15 17:48:29 +00:00
David Rosca df9a95a813 gallium/auxiliary/vl: NIR compute shaders
Remove drawn area check and instead adjust grid layout so that this check
is not needed.
Change crop_x/crop_y from int to float to avoid converting it in shaders,
also all shaders now supports cropping.

Acked-by: Thong Thai <thong.thai@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25562>
2023-11-15 16:06:38 +00:00
David Rosca 848811f98a gallium/auxiliary: NIR blit_compute_shader
Acked-by: Thong Thai <thong.thai@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25562>
2023-11-15 16:06:37 +00:00
Friedrich Vock 03a7cb2618 ac/gpu_info: Manually compute L3 size for Navi33
The firmware reports no MALL cache being present, which is wrong. We
later depend on correct L3 cache size values for choosing the attribute
ring size, so fall back to manually computing the size.

Fixes: 355242f055 ("ac/gpu_info: adjust attribute ring size for gfx11")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26147>
2023-11-15 14:09:50 +00:00
Konstantin Seurer 90f8cf0f36 radv/sqtt: Handle monolithic RT pipelines
This marks them as Unified in the RGP UI and shows the compute shader
view.

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26158>
2023-11-15 13:46:50 +00:00
Konstantin Seurer b6e09dd521 radv/sqtt: Fix tracing acceleration structure commands
ApiRayTracingSeparateCompiled can only used by trace commands.

Fixes: bfb55d0 ("ac/sqtt,radv/sqtt: Add and use marker for separate RT compilation")
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26158>
2023-11-15 13:46:50 +00:00
David Heidelberg 1eff68dd2a ci/traces: drop the freedoom-phase2-gl-high.trace
See https://gitlab.freedesktop.org/mesa/mesa/-/issues/8080#note_2154467

Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8080
Cc: mesa-stable
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26199>
2023-11-15 12:56:01 +00:00
Georg Lehmann b12d7f10d4 aco: validate ALU operands and defs
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26163>
2023-11-15 12:35:32 +00:00
Georg Lehmann 91539713bb aco: add src/def count and size for all ALU opcodes
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26163>
2023-11-15 12:35:32 +00:00
Georg Lehmann d9c3ba3b90 aco: use correct operand size for int tg4 wa
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26163>
2023-11-15 12:35:32 +00:00
Georg Lehmann 1d167d187e aco/gfx10+: don't use v_cmpx with VCC def
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26163>
2023-11-15 12:35:32 +00:00
Georg Lehmann 509ce19643 aco: add missing scc def for SALU quad broadcast
Cc: mesa-stable

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26163>
2023-11-15 12:35:32 +00:00
Georg Lehmann 18f6c2328f aco: use lm for carry out in vsub32
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26163>
2023-11-15 12:35:32 +00:00
Georg Lehmann 9acd9c0100 aco/tests: use correct operand size for some 64bit ops
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26163>
2023-11-15 12:35:32 +00:00
Georg Lehmann 6a136b4e05 aco/tests: add some missing scc defs
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26163>
2023-11-15 12:35:32 +00:00
Georg Lehmann 2f4e53b22a aco: fix detecting sgprs read by SMEM hazard
s_waitcnt_lgkmcnt is SOPK, not SOPP and there are other SOPK instructions
that don't mitigate the hazard.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26163>
2023-11-15 12:35:32 +00:00
Georg Lehmann e49c413a86 aco: use null operand for SOPK s_waitcnt
Both null def and op result in the same correct encoding, but these
instructions optionally read a sgpr, so it makes more sense to use an operand.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26163>
2023-11-15 12:35:32 +00:00
Job Noorman bcf0425f7f ir3: correctly set bit size for 64b constant @load_ubo
When lowering @load_constant to @load_ubo, the bit size is currently
hard-coded to 32. This causes validation errors when lowering a constant
with a 64b bit size.

This patch fixes this by setting the @load_ubo bit size correctly for
64b constants. This 64b load is later lowered to a 32b load by
ir3_nir_lower_64b_intrinsics.

Fixes Piglit test:
- spec@arb_gpu_shader_fp64@execution@fs-indirect-temp-double-src

This patch has no impact on shader-db.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26191>
2023-11-15 11:58:22 +00:00
Samuel Pitoiset bb92c34c28 radv: set radv_zero_vram=true for Unreal Engine 4/5
Unreal Engine seems to rely on uninitialized memory and
RADV_DEBUG=zerovram fixes a bunch of issues.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9025
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9380
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9026
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26188>
2023-11-15 11:24:31 +00:00
Samuel Pitoiset 627d593443 radv: fix registering queues for RGP with compute only
This crashes if the graphics queue isn't created.

Fixes: 930e77e903 ("radv/sqtt: add support for queue info")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10136
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26183>
2023-11-15 10:41:50 +00:00
Matt Turner b66b299eda r600: Add missing dep on git_sha1.h
Bug: https://bugs.gentoo.org/917116
Fixes: 3ab51c7ebd ("r600: Add callbacks for get_driver_uuid and get_device_uuid")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26195>
2023-11-15 10:17:05 +00:00
Karol Herbst 3916ee05b0 rusticl/api: workaround DPCPP fetching clSetProgramSpecializationConstant
Nobody has to advertize it as an extension, but here we are.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25701>
2023-11-15 08:34:57 +00:00
Karol Herbst 924c8e7bcd vtn: add hack for system values placed in CrossWorkgroup memory
Upstream bug: https://github.com/intel/llvm/issues/6703

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25701>
2023-11-15 08:34:57 +00:00
Karol Herbst 41f814df6f nir: allow vec derefs on system values
There is no real reason to prevent this as far as I know. And some of the
SPIR-V generated by DPCPP is running into this.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25701>
2023-11-15 08:34:57 +00:00
Faith Ekstrand 23e1f3c373 nvk: Use nak_shader_info natively
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26197>
2023-11-15 02:24:13 +00:00
Faith Ekstrand c074ea6215 nak: Handle the num_gpr offsetting inside nak
This makes the thing in the nak_shader_info exactly the thing that gets
plugged into the hardware.  Makes the driver a bit simpler.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26197>
2023-11-15 02:24:13 +00:00
Faith Ekstrand d8551cd328 nak: Add a writes_layer bit to nak_shader_info::vtg
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26197>
2023-11-15 02:24:12 +00:00
Faith Ekstrand a232050204 nak: Move clip, cull, and XFB into a nak_shader_info.vtg
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26197>
2023-11-15 02:24:12 +00:00
Faith Ekstrand 440adf7970 nak: Properly prefix nak_xfb_info
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26197>
2023-11-15 02:24:12 +00:00
Faith Ekstrand 4e6e814f5e nak: Rename TLS to SLM
Shader Local Memory is what NVIDIA calls it in the shader header docs as
well as the command stream headers.  Better to be consistent even if it
gets my Intel brain confused.  (Intel uses SLM for shared memory.)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26197>
2023-11-15 02:24:12 +00:00
Faith Ekstrand a946071546 nvk: Use nak_fs_key instead of rolling our own
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26197>
2023-11-15 02:24:12 +00:00
Faith Ekstrand 0f086401e3 nvk: Move even more lowering into nvk_codegen.c
At this point, we're fully trusting NAK to do its own lowering and we
only lower stuff in nvk_shader.c if it's relevant for Vulkan.  This also
assumes that NAK is already doing the right thing everywhere.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26197>
2023-11-15 02:24:12 +00:00
Faith Ekstrand 67bb8e8165 nvk: Move the guts of nvk_compile_nir() to nvk_codegen.c
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26197>
2023-11-15 02:24:12 +00:00
Faith Ekstrand 0405f494e8 nvk: Move the optimization loop to the nvk_codegen.c
We also call it from nak_preprocess_nir and lower var copies there.  NAK
should already be doing this for us.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26197>
2023-11-15 02:24:12 +00:00
Faith Ekstrand 7f8fbacb8a nvk: Move a bunch of codegen-specific lowering to helpers
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26197>
2023-11-15 02:24:12 +00:00
Faith Ekstrand c3a44f6264 nvk: Add a codegen helper for nir_shader_compiler_options
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26197>
2023-11-15 02:24:12 +00:00
Faith Ekstrand 845e7d2911 nvk: Only lower outputs to temporaries
Also, move it up to right after we parse the SPIR-V and remove some now
unnecessary clean-up passes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26197>
2023-11-15 02:24:12 +00:00
Faith Ekstrand 26bb5f4972 nak/nir: Lower indirect FS inputs
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26197>
2023-11-15 02:24:12 +00:00
Faith Ekstrand e507d70333 nvk: Handle load_first_vertex in nvk_nir_lower_descriptors()
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26197>
2023-11-15 02:24:12 +00:00
Faith Ekstrand 82061b1b9d nvk: Only advertise VK_KHR_shader_terminate_invocation if using NAK
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26197>
2023-11-15 02:24:12 +00:00
David Rosca fcfa68a632 Revert "frontends/va: Alloc interlaced surface for interlaced pics"
This reverts commit 578e10e157.

The only reason for reallocating surfaces as interlaced (on drivers
that supports both progressive and interlaced) was deinterlacing
with postproc filter, but that now also supports interleaved surfaces.

With this change interlaced surfaces are no longer used on radeonsi.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26174>
2023-11-15 01:44:29 +00:00
David Rosca eafeff6302 gallium/auxiliary/vl: Support interleaved input in deinterlace filter
This adds support for deinterlacing interleaved surfaces (both fields
interleaved together instead of as separate layers).

Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26174>
2023-11-15 01:44:29 +00:00
David Rosca 35b0ccd855 gallium/auxiliary/vl: Scale dst_rect x0/y0 when rendering chroma plane
This fixes incorrect chroma plane position when x0/y0 is not zero.

Fixes: 001358a97c ("vl/compositor: add a new function for YUV deint")

Acked-by: Thong Thai <thong.thai@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26123>
2023-11-15 01:12:01 +00:00
David Rosca e9091b1f5c gallium/auxiliary: Fix coordinates clamp in util_compute_blit
Fixes: 7c8e1596d6 ("gallium/auxiliary: Fix util_compute_blit half texel offset with scaling")

Acked-by: Thong Thai <thong.thai@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26123>
2023-11-15 01:12:01 +00:00
David Rosca ef0546152f gallium/auxiliary/vl: Fix coordinates clamp in compute shaders
Fixes: a6a43963ed ("gallium/auxiliary/vl: Clamp coordinates in compute shaders")

Acked-by: Thong Thai <thong.thai@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26123>
2023-11-15 01:12:01 +00:00