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Author SHA1 Message Date
Kristian Høgsberg
0d5fe24c9b macros: Add thread-safety annotation macros 
Extracted from !7529

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9061>
 2021-02-18 00:27:49 +00:00
Mike Blumenkrantz
1cef1a34bb zink: move command pool to the batch 
this simplifies things for the future when batches will have multiple
cmdbufs, letting us skip having to track/apply resets for them

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9064>
 2021-02-18 00:13:43 +00:00
Mike Blumenkrantz
575756274a zink: handle dual blending override from driconf 
when this is enabled, we need to push gl_FragData[1] to location 0 and
index 1 so that it gets blended like the application expects

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9095>
 2021-02-18 00:02:17 +00:00
Jason Ekstrand
56d005c21c anv/formats: Advertise linear sampling on depth formats 
They've all supported it since either forever or Iron Lake which is
equivalent to forever for Vulkan.

From Kenneth Graunke's GitLab review:

    "Linear blending of depth buffer data is usually fairly nonsense
    (something's 2 meters away?  another thing's 6 meters away?  let's
    just report 4 meters?)...but it's definitely a thing we can do, so
    we may as well let apps do it, and trust them not when it doesn't
    make sense."

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9110>
 2021-02-17 23:43:22 +00:00
Anuj Phogat
69e94e8939 intel/anv: Fix condition for planar yuv surface 
Test the sampler->conversion for NULL pointer before dereferencing it.

Fixes: Regressions in VulkanCTS.
Fixes: 226316116c "intel/anv: Fix condition to set MipModeFilter for YUV surface"
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
 2021-02-17 15:08:44 -08:00
Daniel Schürmann
29b866fef6 aco: remove special handling of load_helper_invocation 
These should now behave the same as is_helper_invocation.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9058>
 2021-02-17 21:53:52 +00:00
Daniel Schürmann
2e6c9e54f1 nir: lower is/load_helper to zero if no helper lanes are needed 
If there are no helper invocations required during the
execution of the shader, we can assume that there also
are no helper invocations active.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9058>
 2021-02-17 21:53:52 +00:00
Daniel Schürmann
b689a65316 nir: lower load_helper to is_helper if the shader uses demote() 
load_helper_invocation is an Input Builtin, for which the
value should not change during the execution of a shader.
This new pass inserts an is_helper intrinsic before any
demote() instruction and re-uses its value.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9058>
 2021-02-17 21:53:52 +00:00
Ian Romanick
3c31364f5e intel/compiler: Use CMPN for min / max on Gen4 and Gen5 
On Intel platforms before Gen6, there is no min or max instruction.
Instead, a comparison instruction (*more on this below) and a SEL
instruction are used.  Per other IEEE rules, the regular comparison
instruction, CMP, will always return false if either source is NaN.  A
sequence like

    cmp.l.f0.0(16)  null<1>F        g30<8,8,1>F     g22<8,8,1>F
    (+f0.0) sel(16) g8<1>F          g30<8,8,1>F     g22<8,8,1>F

will generate the wrong result for min if g22 is NaN.  The CMP will
return false, and the SEL will pick g22.

To account for this, the hardware has a special comparison instruction
CMPN.  This instruction behaves just like CMP, except if the second
source is NaN, it will return true.  The intention is to use it for min
and max.  This sequence will always generate the correct result:

    cmpn.l.f0.0(16) null<1>F        g30<8,8,1>F     g22<8,8,1>F
    (+f0.0) sel(16) g8<1>F          g30<8,8,1>F     g22<8,8,1>F

The problem is... for whatever reason, we don't emit CMPN.  There was
even a comment in lower_minmax that calls out this very issue!  The bug
is actually older than the "Fixes" below even implies.  That's just when
the comment was added.  That we know of, we never observed a failure
until #4254.

If src1 is known to be a number, either because it's not float or it's
an immediate number, use CMP.  This allows cmod propagation to still do
its thing.  Without this slight optimization, about 8,300 shaders from
shader-db are hurt on Iron Lake.

Fixes the following piglit tests (from piglit!475):

    tests/spec/glsl-1.20/execution/fs-nan-builtin-max.shader_test
    tests/spec/glsl-1.20/execution/fs-nan-builtin-min.shader_test
    tests/spec/glsl-1.20/execution/vs-nan-builtin-max.shader_test
    tests/spec/glsl-1.20/execution/vs-nan-builtin-min.shader_test

Closes: #4254
Fixes: 2f2c00c727 ("i965: Lower min/max after optimization on Gen4/5.")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

Iron Lake and GM45 had similar results. (Iron Lake shown)
total instructions in shared programs: 8115134 -> 8115135 (<.01%)
instructions in affected programs: 229 -> 230 (0.44%)
helped: 0

HURT: 1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9027>
 2021-02-17 19:52:24 +00:00
Ian Romanick
684ec33c79 intel/compiler: Make the CMPN builder work like the CMP builder 
Since the CMPN builder was never used, there was no reason to make its
interface usable. :)

Fixes: 2f2c00c727 ("i965: Lower min/max after optimization on Gen4/5.")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9027>
 2021-02-17 19:52:24 +00:00
Ian Romanick
6c8e2e9317 intel/compiler: Enable the ability to emit CMPN instructions 
v2: Move checks to the EU validator.  Suggested by Jason.

Fixes: 2f2c00c727 ("i965: Lower min/max after optimization on Gen4/5.")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9027>
 2021-02-17 19:52:24 +00:00
Ian Romanick
b0d7434c71 intel/eu/validate: Add some checks for CMP and CMPN 
These checks were originally assertions elsewhere either in the existing
code or later in this MR.

Suggested-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9027>
 2021-02-17 19:52:24 +00:00
Eric Anholt
a212d08296 virgl: Drop a context dependency from part of the shader compile path. 
We should be exposing PIPE_CAP_SHAREABLE_SHADERS, but we aren't.  Clear up
one place that was using it so the next person has less to look through,
and document what's left.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9088>
 2021-02-17 19:31:07 +00:00
Eric Anholt
175c827e72 gallium: Flip the default value of PIPE_CAP_SHAREABLE_SHADERS. 
We should be exposing it in every driver, since it's required eventually
to reduce jank.  Make drivers have to explicitly opt out instead of opt
in.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9088>
 2021-02-17 19:31:07 +00:00
Andres Gomez
64ffe0ad25 ci: build gfxreconstruct v0.9.5 
https://github.com/LunarG/gfxreconstruct/issues/328 and
https://github.com/LunarG/gfxreconstruct/issues/402 are already fixed
in the "master" branch.

Updated the piglit version so it supports this version.

Additionally, LunarG's VulkanTools are not built any more since
GFXReconstruct is now able to generate screenshots on its own without
using the VK_LAYER_LUNARG_screenshot layer.

v2:
  - Explain the VulkanTools removal in the commit log (Martin).

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9032>
 2021-02-17 19:10:42 +00:00
Andres Gomez
5ddabe00c5 ci: only install piglit dependencies when installing piglit 
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9032>
 2021-02-17 19:10:42 +00:00
Andres Gomez
eba962dda4 ci: remove pytest since we don't need it any more 
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9032>
 2021-02-17 19:10:42 +00:00
Jesse Natalie
6f729a7c9d microsoft/clc: Only apply float scaling to 32bit fdiv 
Reviewed By: Bill Kristiansen <billkris@microsoft.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9091>
 2021-02-17 19:01:02 +00:00
Anuj Phogat
226316116c intel/anv: Fix condition to set MipModeFilter for YUV surface 
Mip Mode Filter must be set to MIPFILTER_NONE for Planar YUV surfaces.
Add the missing condition to check for planar format.

Fixes: b24b93d584 "anv: enable VK_KHR_sampler_ycbcr_conversion"
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
 2021-02-17 18:06:07 +00:00
Andres Gomez
c1d33c758e ci: piglit runner colors diff output on failures 
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Martin Peres <martin.peres@mupuf.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9104>
 2021-02-17 17:39:28 +00:00
Alyssa Rosenzweig
2104135f38 nir: Fix grammar error 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9103>
 2021-02-17 17:23:09 +00:00
Samuel Pitoiset
8e97fc3a29 radv: do not allow to capture SQTT on the compute queue 
This currently hangs and I don't know why. It looks better to
print a message instead of hanging the whole system.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9097>
 2021-02-17 16:08:07 +00:00
Samuel Pitoiset
6d8516bd74 radv: stop emitting pipeline bind markers 
RGP actually crashes if pipeline bind markers are emitted without
PSO correlation objects.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9097>
 2021-02-17 16:08:07 +00:00
Samuel Pitoiset
de542784f8 radv: make sure to allocate enough space when emitting SQTT userdata 
If we emit a lot of markers, we might reach the limit easily.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9097>
 2021-02-17 16:08:07 +00:00
Samuel Pitoiset
80709d11d2 radv: remove an outdated TODO about SQTT cache flushes 
It's fully implemented now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9097>
 2021-02-17 16:08:07 +00:00
Samuel Pitoiset
09b23c42f9 radv: move SQTT parameters initialization to radv_thread_trace_init() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9097>
 2021-02-17 16:08:07 +00:00
Samuel Pitoiset
388bde7e82 radv: create the start/stop CS for SQTT dynamically 
This seems much cleaner and will help for future work. Also, this
might help if we want to dynamically change some SQTT parameters
in the future.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9097>
 2021-02-17 16:08:07 +00:00
Andres Gomez
0f7379e308 ci: tracie dashboard URLs only in the failure after the testcase 
When adding the direct link to the diff page in the resulting
JUnit XML file we were not correctly skipping the first line from the
matching range.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4261
Fixes: 27f8c46648 ("ci: recover tracie dashboard URLs for failing traces")
Signed-off-by: Andres Gomez <agomez@igalia.com>
Acked-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8939>
 2021-02-17 16:56:58 +02:00
Andres Gomez
7393303637 ci: correct artifacts location for piglit's runner messages 
We are now using pages.

v2:
  - Define a helper variable for the artifacts base URL (Juan).

Signed-off-by: Andres Gomez <agomez@igalia.com>
Acked-by: Eric Anholt <eric@anholt.net> [v1]
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9092>
 2021-02-17 14:37:35 +00:00
Andres Gomez
87153b8f1c ci: make sure piglit's artifacts are not overwritten 
The ".test" template defines a generic artifact location to upload and
the ".piglit-test" a custom one we don't want to get overwritten by
the generic one.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9092>
 2021-02-17 14:37:35 +00:00
Andres Gomez
4ae5b84a67 ci: correct piglit's HTML summary location for artifacts upload 
Signed-off-by: Andres Gomez <agomez@igalia.com>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9092>
 2021-02-17 14:37:35 +00:00
Andres Gomez
88a6c6a438 ci: clean paths used in the piglit runner 
When running with baremetal, the results path becomes //results. The
unexpected double backslash causes troubles when using sed
later.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9092>
 2021-02-17 14:37:35 +00:00
Pierre-Eric Pelloux-Prayer
90d6365ad4 radeonsi: force dcc clear to use compute clear 
After the previous commit, when running the following
deqp-gles31 caselist:

  dEQP-GLES31.functional.image_load_store.2d.format_reinterpret.rgba32f_rgba32ui
  dEQP-GLES31.functional.image_load_store.2d.format_reinterpret.rgba32f_rgba32i

The second test always fails on gfx10. I don't know why,
but forcing the dcc clear from si_decompress_dcc to use
compute fixes the problem.

The test caselist wasn't failing before because the dcc
disable step was done in si_resource_copy_region, before
calling si_compute_copy_image.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8958>
 2021-02-17 14:57:26 +01:00
Pierre-Eric Pelloux-Prayer
1d64a1045e radeonsi: enable dcc image stores on gfx10+ 
This was implemented in 1d3bffaf9c,
but missing the WRITE_COMPRESS_ENABLE bit, then disabled by
4dc6ed2a59040f04648eadbffeb1522587d00f3.

This commits reimplements it to:
- avoid disabling dcc when uploading FP16 textures
  (see si_use_compute_copy_for_float_formats)
- being able to use compute to upload textures in more cases, rather
  than using the blit path

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8958>
 2021-02-17 14:57:26 +01:00
Pierre-Eric Pelloux-Prayer
f18bceac72 radeonsi: replace force_cp_dma arg of si_clear_buffer by enum 
The new enum has 3 values:
 - SI_CP_DMA_CLEAR_METHOD: equivalent to force_cp_dma = true
 - SI_COMPUTE_CLEAR_METHOD: to force the clear to use compute
 - SI_AUTO_SELECT_CLEAR_METHOD: equivalent to force_cp_dma = false

No functional change yet, but this will be used later.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8958>
 2021-02-17 14:57:26 +01:00
Rhys Perry
1a0b0e8460 radv,aco: allow unaligned LDS access on GFX9+ 
fossil-db (GFX10.3):
Totals from 223 (0.16% of 139391) affected shaders:
SGPRs: 10032 -> 10096 (+0.64%)
VGPRs: 7480 -> 7592 (+1.50%)
CodeSize: 853960 -> 821920 (-3.75%); split: -3.76%, +0.01%
MaxWaves: 5916 -> 5908 (-0.14%)
Instrs: 154935 -> 150281 (-3.00%); split: -3.01%, +0.01%
Cycles: 3202496 -> 3080680 (-3.80%); split: -3.81%, +0.00%
VMEM: 48187 -> 46671 (-3.15%); split: +0.29%, -3.44%
SMEM: 13869 -> 13850 (-0.14%); split: +1.52%, -1.66%
VClause: 3110 -> 3085 (-0.80%); split: -1.03%, +0.23%
SClause: 4376 -> 4381 (+0.11%)
Copies: 12132 -> 12065 (-0.55%); split: -2.61%, +2.06%
Branches: 5204 -> 5203 (-0.02%)
PreVGPRs: 6304 -> 6359 (+0.87%); split: -0.10%, +0.97%

See https://reviews.llvm.org/D82788

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8762>
 2021-02-17 12:57:12 +00:00
Rhys Perry
c2d57f55a8 radv: relax shared alignment requirements in mem_vectorize_callback 
fossil-db (GFX10.3):
Totals from 13 (0.01% of 139391) affected shaders:
CodeSize: 241316 -> 238684 (-1.09%)
Instrs: 42251 -> 41912 (-0.80%); split: -0.81%, +0.01%
Cycles: 1991192 -> 1974668 (-0.83%); split: -0.83%, +0.00%
VMEM: 4067 -> 4102 (+0.86%)
SMEM: 569 -> 578 (+1.58%)
SClause: 848 -> 858 (+1.18%)
Copies: 3077 -> 2992 (-2.76%); split: -3.12%, +0.36%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8762>
 2021-02-17 12:57:12 +00:00
Mike Blumenkrantz
4feca7ecde gallium/trace: add a pipe_screen::get_compiler_options method 
this fixes crashes on startup

Fixes: a3512ddfdf ("st/mesa: don't enable NV_copy_depth_to_color if NIR doesn't support FP64")

fixes mesa/mesa#4312

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9082>
 2021-02-17 12:24:33 +00:00
Marek Olšák
c59fd3acb9 glthread: ignore the return value of glUnmapBuffer, don't sync, and return true 
We always return GL_TRUE from the Unmap functions.

gl_marshal.py is modified so as not to use "return" in the unmarshal
function, which always returns void.

Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9029>
 2021-02-17 05:47:27 -05:00
Marek Olšák
638a184849 glthread: don't sync when using pixel buffer objects 
The pointer is a GPU offset if a PBO is bound.

Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9029>
 2021-02-17 05:47:25 -05:00
Marek Olšák
0b6739ef80 glthread: don't declare pointers with const in unmarshal functions 
so that GL functions with a non-const pointer don't print a warning when
we call them, such as glGetTexImage with a PBO where the pointer is really
just an offset.

Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9029>
 2021-02-17 05:47:23 -05:00
Marek Olšák
2804d489e3 glthread: assume all parameters are fixed if marshal_sync is present 
We want glthread to ignore variable-sized parameters if the only thing
we want is to pass the pointer parameter as-is, e.g. when a PBO is bound.
Making it conditional on marshal_sync is kinda hacky, but it's the easiest
path towards handling PBOs, which will use marshal_sync to check whether
a PBO is bound.

Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9029>
 2021-02-17 05:47:21 -05:00
Marek Olšák
8288882965 radeonsi: set MEM_ORDERED optimally 
It must be 1 only if both sampler and non-sampler VMEM instructions
that return something are used. BVH counts as a sampler instruction.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9028>
 2021-02-17 04:49:24 -05:00
Marek Olšák
e9e385b084 radeonsi: gather shader info about VMEM usage for MEM_ORDERED 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9028>
 2021-02-17 04:49:24 -05:00
Marek Olšák
27e22f025c radeonsi: gather shader info about indirect UBO/SSBO/samplers/images 
A future commit will use it.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9028>
 2021-02-17 04:49:24 -05:00
Marek Olšák
d47c44add8 radeonsi: gather info about bindless images and memory stores with strstr(intr) 
This is only code simplification.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9028>
 2021-02-17 04:49:24 -05:00
Marek Olšák
5e47d6fc73 radeonsi: fix the value of uses_bindless_samplers 
We don't have any nir_variables for uniforms, so this code wasn't
doing anything. Also, uniform handles are almost always uniforms.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9028>
 2021-02-17 04:49:24 -05:00
Marek Olšák
19e6601413 radeonsi: do late NIR optimizations after uniform inlining 
This was missing.

Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9028>
 2021-02-17 04:49:24 -05:00
Marek Olšák
33ac9dec91 radeonsi: allocate filled_size for streamout targets in set_streamout_buffers 
so that create_stream_output_target doesn't use the context and can be
called from any thread. This is for u_threaded_context.

Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9028>
 2021-02-17 04:49:24 -05:00
Marek Olšák
9db4b331f9 radeonsi: improve comments in si_emit_derived_tess_state 
Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9028>
 2021-02-17 04:49:24 -05:00