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Author SHA1 Message Date
Faith Ekstrand
208f8ed429 nil: Use the enums from the hwref headers for PTE kinds 
This isn't an exact translation.  It's identical to the previous values
for all uncompressed items but I fixed some of the compressed ones
(which we don't currently use) based on the enum names.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24596>
 2024-04-19 15:43:14 -05:00
Faith Ekstrand
51ffb45b5c nouveau/headers: Add the MMU headers to the Rust crate 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24596>
 2024-04-19 15:43:14 -05:00
Faith Ekstrand
3bd8a2568d nouveau: Import the hwref headers from Nvidia OGK 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24596>
 2024-04-19 14:20:35 -05:00
Faith Ekstrand
16f2249a80 nvk: Use the NAK helpers to fill QMDs 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28756>
 2024-04-19 18:56:03 +00:00
Faith Ekstrand
9ace83603d nvk: QMDs are 64 dwords 
All the QMD structs are 2048 bits which, unless I'm doing my math wrong,
is 64 dwords, not 128.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28756>
 2024-04-19 18:56:03 +00:00
Faith Ekstrand
b9c0e3c1ab nak: Add helpers for filling QMDs 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28756>
 2024-04-19 18:56:03 +00:00
Faith Ekstrand
64f02ac16d nouveau/headers: Generate Rust for QMDs 
This also involves adding array support to the struct parser.
Fortunately, the header files for QMDs are really consistent here and we
can make lots of assumptions like that i is always the index variable.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28756>
 2024-04-19 18:56:02 +00:00
Faith Ekstrand
20c1a69125 nouveau/headers: Move the classes into a submodule for Rust 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28756>
 2024-04-19 18:56:02 +00:00
Faith Ekstrand
7e87f3ccde nvk: Restrict shaderFloat16 to Ampere+ for now 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28756>
 2024-04-19 18:56:02 +00:00
Valentine Burley
4850aebcaf tu: Replace TU_FROM_HANDLE with VK_FROM_HANDLE 
It was exactly the same thing.

Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28571>
 2024-04-19 18:00:12 +00:00
Ian Romanick
a5adbae6f6 nir: intel/brw: Remove cmat_signed_mask from dpas_intel intrinsic 
It is not used. The signedness is inferred from src_type and dest_type.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28822>
 2024-04-19 09:53:29 -07:00
Ian Romanick
2ce558d928 intel/brw: Fix handling of cmat_signed_mask 
For integer types, the signedness is determined by flags on the muladd
instruction. The types of the sources play no role. Previously we were
using the signedness of the type and ignoring the mask.

Adjust the types passed to the dpas_intel intrinsic to match.

Fixes various
dEQP-VK.compute.*.cooperative_matrix.khr_*.matrixmuladd_cross.* tests on
different Intel platforms. Some platforms had failing tests, and some
platforms failed EU validation before the tests could fail.

Fixes: 6b14da33ad ("intel/fs: nir: Add nir_intrinsic_dpas_intel")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28822>
 2024-04-19 09:53:27 -07:00
Mike Blumenkrantz
ce05a7c3a2 zink: ci updates 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28723>
 2024-04-19 14:47:10 +00:00
Mike Blumenkrantz
6fe0cfdc09 zink: vectorize io loads/stores when possible 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28723>
 2024-04-19 14:47:10 +00:00
Mike Blumenkrantz
3c673919c3 zink: run nir_lower_io_to_scalar (mostly) unconditionally and earlier 
this fixes some cases with separate shaders where an output component
store was eliminated early but the input component load was not also
eliminated

some outputs can't yet be scalarized without exploding everything

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28723>
 2024-04-19 14:47:10 +00:00
Mike Blumenkrantz
4b2fe347b1 zink: copy shader name when copying shader info 
this needs a separate allocation

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28723>
 2024-04-19 14:47:10 +00:00
Samuel Pitoiset
390479e948 zink/ci: update CI lists since piglit uprev 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28830>
 2024-04-19 14:25:08 +00:00
José Roberto de Souza
18d8c3ca33 anv: Add missing ANV_BO_ALLOC_INTERNAL 
Some places doing driver internal allocations was not setting
ANV_BO_ALLOC_INTERNAL, so adding the flag in those places here.

This will increase the accuracy of the RMV report.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28677>
 2024-04-19 13:15:01 +00:00
Connor Abbott
61b2bd861f ir3: Rewrite nop insertion 
Don't try to chase across blocks to find a matching destination for a
given source. This can be prone to exponential blowup when there is a
complicated series of if-ladders and we have to crawl through every
possible path. With scalar ALU, this was causing timeouts on one test
when we stopped counting scalar ALU. Rather than adding yet more
band-aids, just switch to a different approach that most other backends
are using where we have a scoreboard of outstanding registers and we
keep track of the cycle when each register becomes "ready". This
integrates nicely into the pre-existing ir3 legalize infrastructure for
(ss) and (sy), although it does require duplicating the logic in
ir3_delayslots() in a different form.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28750>
 2024-04-19 12:02:59 +00:00
Connor Abbott
9df3323564 ir3/legalize: Fix intra-block state propagation with loops 
At the beginning of each block we were taking the state for the current
block, which after traversing the block already will contain the state
at the *end* of the block, and combining it with the predecessors to get
the state for the *start* of the block. This will cause
over-synchronization.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28750>
 2024-04-19 12:02:58 +00:00
Sergi Blanch Torne
ec45e8294c Uprev Piglit to f7ece74a107a2f99b2f494d978c84f8d51faa703 
dd6f7eaf82...f7ece74a10

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28820>
 2024-04-19 11:25:20 +00:00
Mary Guillemard
6c00441bfa panvk: Advertise VK_KHR_driver_properties 
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28715>
 2024-04-19 11:03:22 +00:00
Mary Guillemard
f7f9b3d170 panvk: Move to vk_properties 
This remove GetPhysicalDeviceProperties2 in favor of vk_properties.

This report the same values as previous on vulkaninfo.

In case some missing values, the same values as the ARM proprietary
driver were used.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28715>
 2024-04-19 11:03:22 +00:00
Mary Guillemard
a9f170f613 panvk: Fix driver UUID not being filled 
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28715>
 2024-04-19 11:03:22 +00:00
Mary Guillemard
a0f80774ce panvk: Return os_page_size for minMemoryMapAlignment 
The spec says "When mapping a memory allocation with vkMapMemory,
subtracting offset bytes from the returned pointer will always produce
an integer multiple of this limit", meaning the OS page size.

As the page size depends on the kernel configuration, this should be
queried at runtime.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28715>
 2024-04-19 11:03:22 +00:00
Boris Brezillon
c040283e7a panvk: Dissociate UBO and push_constant emission 
Now that push constants are pushed to the FAU buffer, we can dissociate
UBO preparation from push constant preparation, and have
panvk_cmd_prepare_push_constants() called explicitly from
panvk_cmd_draw()/panvk_CmdDispatch().

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28397>
 2024-04-19 10:41:51 +00:00
Boris Brezillon
0721de3bb9 panvk: Stop lowering push constant loads to UBO loads 
Now that we populate the push constant array properly, and the bifrost
compiler lowers dynamic push constant indexing, we can kill the push
constant lowering pass we had in panvk.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28397>
 2024-04-19 10:41:51 +00:00
Boris Brezillon
46e764c5e1 panvk: Pass the push constant array to draw/dispatch calls 
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28397>
 2024-04-19 10:41:51 +00:00
Boris Brezillon
04d7b9c396 panvk: Stop declaring one push constant array per graphics stage 
The push constant array is shared by all stages anyway, so let's just
declare one array. While at it, change the name into push_uniforms to
be consistent with the name we have in panvk_dispatch.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28397>
 2024-04-19 10:41:51 +00:00
Eric Engestrom
fac41af93c rpi4/ci: add new flakes from last night's run 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28827>
 2024-04-19 10:14:35 +00:00
Eric Engestrom
2d24561da9 rpi4/ci: sort flakes 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28827>
 2024-04-19 10:14:35 +00:00
Eric Engestrom
3432abd611 rpi5/ci: add flakes from last night's run 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28827>
 2024-04-19 10:14:35 +00:00
Eric Engestrom
e34850ea23 rpi5/ci: sort flakes 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28827>
 2024-04-19 10:14:35 +00:00
David Rosca
9bfb07586c radv/video: Implement per picture type min/max QP 
Bump required FW version for VCN 1 and 2.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28727>
 2024-04-19 09:51:07 +00:00
David Rosca
694cc4728d radv/video: Avoid resetting rate control every frame 
begin() resets rate control state, calling it every frame will cause
issues such as not reaching the desired target bitrate.
Rate control only has to be reset when changing rate control mode,
otherwise it's enough to update the parameters.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28727>
 2024-04-19 09:51:06 +00:00
David Rosca
1000260ed8 radv/video: Set maxSublayerCount to 4 for H265 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28727>
 2024-04-19 09:51:06 +00:00
Juan A. Suarez Romero
ea1f09a5f2 v3dv/ci: update expected list 
Add new failures due CTS upgrade.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28824>
 2024-04-19 09:19:09 +00:00
Timur Kristóf
b3c6b48493 ac/nir/tess: Use LDS IO mapping when loading tess levels from LDS. 
By accident, the VRAM mapping was used. This doesn't cause issues
in practice because the offsets are really the same, but it's still
better to fix this.

Fixes: c61eb54806
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28739>
 2024-04-19 08:54:24 +00:00
Timur Kristóf
0fdb388698 ac/nir/tess: Split I/O mapping to two functions. 
No functional changes, just improves code clarity.

Fixes: c61eb54806
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28739>
 2024-04-19 08:54:24 +00:00
Timur Kristóf
2d9e38dbe5 radv: Calculate VRAM tess patch size independently of LDS size. 
We recently made some effort to reduce the LDS use of TCS:
The lowering no longer uses the same output location mapping when
storing TCS outputs to LDS and VRAM. This means that the same
patch will use a different amount of LDS and VRAM.

Therefore, we need to properly calculate the patch size in VRAM
when determining the number of output patches.

Fixes: 0e481a4adc
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28739>
 2024-04-19 08:54:23 +00:00
Timur Kristóf
8190a65c78 radv: Rename LDS related variables in get_tcs_num_patches. 
No functional changes, just improves code clarity.

Fixes: 0e481a4adc
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28739>
 2024-04-19 08:54:23 +00:00
Samuel Pitoiset
54b08d6bbf radv: return per plane requirements for disjoint images 
Returning the whole image size/alignment isn't wrong but it's wasteful
for disjoint images which requires a separate bound memory object per
plane.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10997
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28808>
 2024-04-19 08:17:55 +00:00
Samuel Pitoiset
e18cc3b39b radv: fix waiting for occlusion queries on GFX6-8 
Occlusion queries don't go through L2 on GFX6-8, and waiting properly
in shaders is more complicated to implement. Use the previous
WAIT_REG_MEM logic on these GPUs to fix this.

This fixes flickering on many games on GFX8.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8954
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9415
Fixes: d44651bfc3 ("radv: wait for occlusion queries in the resolve query shader")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28796>
 2024-04-19 07:36:37 +00:00
Mary Guillemard
fe1aa98ab9 nak: Allow SHF to use immediate encoding for shift 
This is pretty common and avoid using a register for nothing in most
cases.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28819>
 2024-04-19 07:18:22 +00:00
Eric Engestrom
f008f6a33b util/futex: replace double-cast check with a simple sign check 
We want to know whether the signed int can be represented by an unsigned int
of the same size (no down-cast); for that, all we need is for it to be `>= 0`,
so let's check that.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28804>
 2024-04-19 06:38:58 +00:00
Mike Blumenkrantz
042b8a65d3 brw/lower_a2c: fix for scalarized fs outputs 
it's legal for a fs to write xyzw components separately,
and this pass should handle such cases

cc: mesa-stable

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28752>
 2024-04-18 23:27:22 +00:00
Jordan Justen
4e5ed7ebd5 intel/brw: Avoid getting a stride of 0 for nir_intrinsic_exclusive_scan 
Ref: 671745b616 ("intel/fs: Don't allow 0 stride on MOV destination")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28821>
 2024-04-18 23:03:57 +00:00
Ian Romanick
90e12ed843 intel/brw/xe2+: Only apply Wa 22016140776 to math instructions 
The check in has_invalid_src_region incorrectly omitted inst->is_math()
from the condition.

Fixes: 0e817ba548 ("intel/brw/xe2+: Implement Wa 22016140776")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28821>
 2024-04-18 23:03:57 +00:00
Lucas Fryzek
112063a060 llvmpipe: Only use udmabuf if header is found 
Fixes #11032

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28810>
 2024-04-18 22:20:58 +00:00
Lucas Fryzek
053b5f3e0c llvmpipe: Only return null resource handle when dt is not mapped 
Fixes #10995

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28810>
 2024-04-18 22:20:57 +00:00