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Author SHA1 Message Date
Samuel Pitoiset
44314e1ea6 ac,radv,radeonsi: add ac_tracked_regs 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38740>
 2025-12-17 15:09:24 +00:00
Samuel Pitoiset
c97bd17d4d radv: switch to AC_TRACKED_xxx 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38740>
 2025-12-17 15:09:23 +00:00
Samuel Pitoiset
fad24d6fcc ac/cmdbuf: add new slots to ac_tracked_reg 
For RADV registers that aren't tracked in RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38740>
 2025-12-17 15:09:23 +00:00
Samuel Pitoiset
18bdb76408 ac,radeonsi: move si_tracked_reg to common code 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38740>
 2025-12-17 15:09:22 +00:00
Icenowy Zheng
6bda88bfdb pvr: copy WSI can_present_on_device function from PanVK 
Both PVR and PanVK are drivers for generic embedded GPU IP cores, so
just take the can_present_on_device implementation from PanVK, which
allows any platform devices for presentation.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38985>
 2025-12-17 14:53:39 +00:00
Martin Roukala (né Peres)
8b8e472c65 zink/ci: update the a750 expectations 
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38977>
 2025-12-17 14:10:32 +00:00
Martin Roukala (né Peres)
5f54ae9048 turnip/ci: update the vkd3d expectations 
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38977>
 2025-12-17 14:10:32 +00:00
Martin Roukala (né Peres)
f155711a33 freedreno/ci: update the a750 expectations 
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38977>
 2025-12-17 14:10:32 +00:00
Martin Roukala (né Peres)
6993b0172b freedreno/ci/a750: switch to the linux-firmware-provided gpu fw 
Now that qcom has released the gpu firmware for the a750, let's stop
using my fw package in favor of the publicly-available ones.

v2:

 * Be more specific in the list of files we want to keep (lumag)
 * Uprev the linux firmware version
 * Use gfx-ci/firmware rather than the upstream gitlab repo

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38977>
 2025-12-17 14:10:32 +00:00
Erik Faye-Lund
74b7b68628 mesa/st: always override internal-format for 10-bit formats 
We also need to do this in the GLES-only code-path, otherwise we'll end
up setting PIPE_BIND_RENDER_TARGET for these, which means we'll
incorrectly require these to be color-renderable.

Fixes: 60e115dedf ("mesa/st: do not drop binding prematurely")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38945>
 2025-12-17 13:42:21 +00:00
Caterina Shablia
0da350f879 panvk: remove AFBC header zeroing 
This is not actually necessary and moreover was corrupting
mipmapped arrayed 2D images in cases when the transition barrier
wasn't transitioning all mips, but more than one layer.

Keep the layout transition infrastructure in place as we'll need
it for transaction elimination CRC zeroing on v10-.

Fixes: c95f8993 ("panvk: add a meta command for transitioning image layout")

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38972>
 2025-12-17 12:33:58 +00:00
Caterina Shablia
d8ceb38ef1 panvk: do not access the image in image view's destructor 
Vulkan allows destroying an image without destroying the views of
this image first. These views can not be used in any way and the
only thing that the user can do with such a view is destroy it.
This also means that the driver can not refer to the image inside
the image view's destructor.

Fixes cb3f6481 ("panvk: Create MS shadow images and views")

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38972>
 2025-12-17 12:33:58 +00:00
Samuel Pitoiset
bf2aa05b60 zink/ci: add two tests to the skip lists 
They either fails or hangs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38714>
 2025-12-17 11:11:18 +00:00
Samuel Pitoiset
5d76202b6d radv: create descriptors for color/depth-stencil surfaces earlier 
For less CPU overhead when rendering begins and also because it's
easy to pre-compute those descriptors.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38714>
 2025-12-17 11:11:18 +00:00
Samuel Pitoiset
c8729cdd3c radv/meta: stop passing a stencil attachment for depth decompress 
It should only be the depth aspect.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38714>
 2025-12-17 11:11:18 +00:00
Samuel Pitoiset
43d7d97b13 radv/meta: inject image view usage info 
This will be used to initialize color/depth-stencil descriptors earlier
when the image view is created.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38714>
 2025-12-17 11:11:18 +00:00
Samuel Pitoiset
ce69cabb60 radv: constify radv_{cb,ds}_buffer_info parameters 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38714>
 2025-12-17 11:11:18 +00:00
Lucas Fryzek
48799005d7 Revert "drisw: Copy entire buffer ignoring damage regions" 
This reverts commit 755e795e4c.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38817>
 2025-12-17 10:06:32 +00:00
Lucas Fryzek
17ab0f2ece drisw: Modify drisw_swap_buffers_with_damage to swap entire buffer 
When swapping buffer with damage regions, to be strictly correct we
need to swap the entire back buffer to the front buffer. This needs to
be done in case the compositor does not support damage regions. This
means we need to ignore the input damage region and tell drisw to swap
the entire buffer.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38817>
 2025-12-17 10:06:32 +00:00
Georg Lehmann
37c3a2fb89 zink/ci: update radv trace checksums 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38730>
 2025-12-17 08:41:32 +00:00
Georg Lehmann
0478021fdc aco/optimizer: reassociate rcp(mul(a, const)) into rcp_omod(a) 
Foz-DB Navi48:
Totals from 2484 (2.54% of 97637) affected shaders:
Instrs: 10368279 -> 10361892 (-0.06%); split: -0.06%, +0.00%
CodeSize: 55161104 -> 55150752 (-0.02%); split: -0.02%, +0.00%
SpillSGPRs: 14665 -> 14666 (+0.01%)
Latency: 87694014 -> 87689324 (-0.01%); split: -0.01%, +0.00%
InvThroughput: 16595764 -> 16594448 (-0.01%); split: -0.01%, +0.00%
VClause: 209922 -> 209918 (-0.00%); split: -0.01%, +0.00%
SClause: 205195 -> 205251 (+0.03%); split: -0.01%, +0.04%
Copies: 843771 -> 843765 (-0.00%); split: -0.01%, +0.01%
Branches: 275985 -> 275962 (-0.01%); split: -0.01%, +0.00%
PreVGPRs: 170608 -> 170494 (-0.07%)
VALU: 5840893 -> 5838038 (-0.05%); split: -0.05%, +0.00%
SALU: 1481388 -> 1479037 (-0.16%); split: -0.16%, +0.00%
VOPD: 7496 -> 7485 (-0.15%)

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38730>
 2025-12-17 08:41:32 +00:00
Georg Lehmann
a8f5ced670 aco/optimizer: reassociate mul(mul(a, const), b) into mul_omod(a, b) 
Foz-DB Navi48:
Totals from 14608 (14.96% of 97637) affected shaders:
MaxWaves: 364201 -> 364421 (+0.06%)
Instrs: 28051720 -> 28022503 (-0.10%); split: -0.13%, +0.03%
CodeSize: 148938740 -> 148943480 (+0.00%); split: -0.04%, +0.04%
VGPRs: 994520 -> 994004 (-0.05%); split: -0.05%, +0.00%
SpillSGPRs: 45182 -> 45179 (-0.01%)
Latency: 187734461 -> 187725301 (-0.00%); split: -0.07%, +0.06%
InvThroughput: 33967002 -> 33949881 (-0.05%); split: -0.11%, +0.06%
VClause: 495237 -> 495207 (-0.01%); split: -0.03%, +0.02%
Copies: 2048324 -> 2047937 (-0.02%); split: -0.12%, +0.10%
Branches: 598445 -> 598431 (-0.00%); split: -0.01%, +0.01%
PreSGPRs: 877715 -> 877684 (-0.00%)
PreVGPRs: 778146 -> 776383 (-0.23%); split: -0.23%, +0.00%
VALU: 16413380 -> 16391508 (-0.13%); split: -0.15%, +0.01%
SALU: 3685279 -> 3677655 (-0.21%); split: -0.23%, +0.02%
VOPD: 26219 -> 25926 (-1.12%); split: +0.43%, -1.55%

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38730>
 2025-12-17 08:41:31 +00:00
Daniel Schürmann
125ac1626d radv: remove precomputed registers from radv_shader_binary 
It is enough to compute them after upload.
This saves some disk space and eliminates an unlikely
bug where the shader cache is shared between two GPUs
with the same chip but a different number of enabled CUs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38970>
 2025-12-17 08:16:06 +00:00
Sagar Ghuge
61287b00f3 anv: Stop using RCS companion for MSAA copy/clear on Xe3+ 
On Xe3+, we have typed MSAA load/store message support. We can use them
during MSAA copies. We don't have to fallback on RCS companion queue
anymore.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33905>
 2025-12-17 05:34:02 +00:00
Sagar Ghuge
de0c547448 blorp: Handle 2D MSAA array image copies on compute shader 
We are passing number of layers as inline parameter register, so figure
out z_pos and write to 2D MSAA array images in compute
shader. We already get component X, Y and sample index, all we needed
was the number of layers.

Ken:
- Use load/store var instead of derefs

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33905>
 2025-12-17 05:34:02 +00:00
Sagar Ghuge
080d28a03e blorp: Set persample_msaa_dispatch for render shader 
Only 3D shader gets dispatched per sample not the compute shader.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33905>
 2025-12-17 05:34:02 +00:00
Lionel Landwerlin
d99a3d9b58 anv: remove CS-L3 coherency on Xe2 
I'll try to write some crucible tests for this.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: be5f5f659f ("anv: consider CS coherent with L3 on Xe2+")
Fixes: 503355c7f8 ("anv: update pipeline barriers for Xe2+")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38966>
 2025-12-16 21:35:27 +00:00
Steev Klimaszewski
10f259e673 tu: Stop printing descriptor pool allocation failures 
The VK_ERROR_FRAGMENTED_POOL and VK_ERROR_OUT_OF_POOL_MEMORY errors are
not as exceptional cases as most.  These are expected to be hit by
applications in the normal course of doing their thing.  Probably best
not to spam stderr and the debug logs with them.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38940>
 2025-12-16 21:11:41 +00:00
Rob Clark
a520752328 freedreno/a6xx: gen8 lrz support 
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38930>
 2025-12-16 19:38:38 +00:00
Rob Clark
0e82a8d759 freedreno/a6xx: Fix layered lrz 
Don't hard-code to a single layer, and fix lrz (slow) clear path to
account for the # of layers.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5582
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38930>
 2025-12-16 19:38:37 +00:00
Rob Clark
14a23e8b3e freedreno/lrz: Add gen8 lrz layout support 
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38930>
 2025-12-16 19:38:37 +00:00
Rob Clark
81c465372a freedreno/a6xx: Fix GRAS_LRZ_BUFFER_SLICE_PITCH 
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38930>
 2025-12-16 19:38:37 +00:00
Rob Clark
cb201e5755 freedreno/a6xx: Fix GRAS_LRZ_BUFFER_PITCH 
The pitch is in bytes, rather than pixels, whereas internally lrz_layout
uses a pitch in pixels.  Adjust the xml and state emit accordingly.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38930>
 2025-12-16 19:38:37 +00:00
Rob Clark
17b567485a freedreno/devices: Add num_slices 
Add num_slices param to the device info.  This will be needed for
calculating LRZ layout.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38930>
 2025-12-16 19:38:37 +00:00
Aitor Camacho
57c93d31f2 kk: Expose occlusionQueryPrecise 
Acked-by: Arcady Goldmints-Orlov <arcady@lunarg.com>
Signed-off-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38957>
 2025-12-16 19:05:16 +00:00
Aitor Camacho
317a249205 kk: Attachmentless render passes start postponed to pipeline bind 
Sample count is only known at pipeline bind not when the render pass is
started since there is no attachments to infer sample count.

Acked-by: Arcady Goldmints-Orlov <arcady@lunarg.com>
Signed-off-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38957>
 2025-12-16 19:05:16 +00:00
Aitor Camacho
279679ce0c kk: Remove render pass logic in event set/reset entrypoints 
vkCmdSetEvent2 and vkCmdResetEvent2 can only be called from outside a
render pass so there is no need to handle anything about them.

Acked-by: Arcady Goldmints-Orlov <arcady@lunarg.com>
Signed-off-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38957>
 2025-12-16 19:05:16 +00:00
Aitor Camacho
e11240228b kk: Remove signal and end from upload writes not to end compute encoders 
Not ending the compute encoder allows us to concatenate next commands into
the same encoder if a compute encoder is requested.

Acked-by: Arcady Goldmints-Orlov <arcady@lunarg.com>
Signed-off-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38957>
 2025-12-16 19:05:16 +00:00
Aitor Camacho
ea7f5f7f1c kk: Propagate availability before we reset it in vkCmdResetQueryPool 
Required to avoid availability write races. We could have an availability
update pending so adding the reset availability write to the same pool of
writes led to write races. Avoid this by flushing writes before reseting
queries.

Acked-by: Arcady Goldmints-Orlov <arcady@lunarg.com>
Signed-off-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38957>
 2025-12-16 19:05:16 +00:00
Aitor Camacho
53cea0ab43 kk: Update query availability only if it has availability 
Acked-by: Arcady Goldmints-Orlov <arcady@lunarg.com>
Signed-off-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38957>
 2025-12-16 19:05:15 +00:00
Aitor Camacho
5b1a89e21a kk: Change queue writes timing for easier compute merge for Metal4 upgrade 
Writes will now happen before a command encoder is started aiming to merge
them with the existing compute encoder before we end it. Alternatively,
they also happen when a compute encoder is started. This will simplify
the migration to Metal4 later down the road.

Acked-by: Arcady Goldmints-Orlov <arcady@lunarg.com>
Signed-off-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38957>
 2025-12-16 19:05:14 +00:00
Aitor Camacho
86b5d376f5 kk: Simplify compute and blit encoder start 
Acked-by: Arcady Goldmints-Orlov <arcady@lunarg.com>
Signed-off-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38957>
 2025-12-16 19:05:14 +00:00
Aitor Camacho
237f8cbe6b kk: Split internally encoder fence signal and end 
Acked-by: Arcady Goldmints-Orlov <arcady@lunarg.com>
Signed-off-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38957>
 2025-12-16 19:05:13 +00:00
Aitor Camacho
2e2813f013 kk: Remove unneeded entrypoints in kk_encoder.h 
Acked-by: Arcady Goldmints-Orlov <arcady@lunarg.com>
Signed-off-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38957>
 2025-12-16 19:05:12 +00:00
Aitor Camacho
7b435be0d6 kk: Mark graphics descriptors' root dirty when dirtying graphics state 
Signed-off-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38938>
 2025-12-16 18:46:35 +00:00
Aitor Camacho
9ef979b48b kk: Account for dynamic VI when flushing draw state 
Signed-off-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38938>
 2025-12-16 18:46:35 +00:00
Yiwei Zhang
6865ff18ba kk: support VK_(KHR|EXT)_calibrated_timestamps 
Use common implementation.

Reviewed-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38965>
 2025-12-16 18:30:21 +00:00
Yiwei Zhang
3a73a7ba29 kk: add mtl_device_get_gpu_timestamp bridge 
Reviewed-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38965>
 2025-12-16 18:30:21 +00:00
Alyssa Rosenzweig
819213dc29 hk: fix flrp lowering 
Piles of CTS blowing up, e.g. dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.color.2d.r5g6b5_unorm_pack16.r32g32b32a32_sfloat.optimal_optimal_linear

Fixes: 4bbc29373a ("nir/lower_flrp: Check and set shader_info::flrp_lowered")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38955>
 2025-12-16 17:42:10 +00:00
Alyssa Rosenzweig
09d493fc54 asahi: clang-format 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38955>
 2025-12-16 17:42:10 +00:00