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Author SHA1 Message Date
Jesse Natalie 9c4c1796d7 d3d12: Point sprite lowering pass needs to handle arrays 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27999>
 2024-03-06 00:54:31 +00:00
Jesse Natalie 788c106ea1 wgl: Initialize DEVMODE struct 
Otherwise the dmDriverExtra field might be uninitialized and have a nonzero
value, which can cause the API implementation to smash the stack when copying
to the output struct.

Cc: mesa-stable
Reviewed-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27998>
 2024-03-06 00:33:58 +00:00
Faith Ekstrand d1cf01dc52 vulkan/pipeline: Always init pipeline cache objects 
vk_shader_init_cache_obj() is fast enough and the already-found case is
rare enough that there's no good reason to avoid the init.  This allows
us to use vk_shader_unref instead of vk_shader_destroy which is probably
a touch safer over-all.  It also fixes the assert that the two shaders
have matching keys.

Fixes: bb8b11d806 ("vulkan/pipeline: Handle fully compiled library shaders properly")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10752
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27993>
 2024-03-05 23:12:34 +00:00
Timur Kristóf def0c275c4 aco: Eliminate SCC copies when possible. 
Foz-DB Navi31:
Totals from 2517 (3.22% of 78112) affected shaders:
Instrs: 5992126 -> 5972611 (-0.33%); split: -0.33%, +0.00%
CodeSize: 30986404 -> 30914536 (-0.23%); split: -0.23%, +0.00%
Latency: 43221112 -> 43217422 (-0.01%); split: -0.02%, +0.01%
InvThroughput: 6675983 -> 6674598 (-0.02%); split: -0.02%, +0.00%
SClause: 181987 -> 181976 (-0.01%); split: -0.01%, +0.00%
Copies: 538852 -> 519419 (-3.61%)

Co-authored-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27072>
 2024-03-05 22:51:01 +00:00
Mike Blumenkrantz 9a53e3b1fd nvk: bump NVK_PUSH_MAX_SYNCS to 256 
technically this needs to be MUCH higher since there's no limitation
on the number of semaphore waits that can be submitted, but this is
enough to handle zink usage

fixes KHR-GL46.sparse_buffer_tests.BufferStorageTest

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27992>
 2024-03-05 22:34:58 +00:00
Jesse Natalie ba17f5ca6a microsoft/compiler: Remove code after discard/terminate in later optimization steps 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27996>
 2024-03-05 21:40:09 +00:00
Chia-I Wu 3d4dfae7eb aco: fix nir_op_pack_32_4x8 handling 
I started seeing

  ACO ERROR:
      In file ../src/amd/compiler/aco_validate.cpp:98
      Operand and Definition types do not match:  s1: %44 = p_parallelcopy %158
  test_basic: ../src/amd/compiler/aco_interface.cpp:85: void validate(aco::Program*):
      Assertion `is_valid' failed.

since commit 52ee4cf229 ("nir/builder: Teach nir_pack_bits and
nir_unpack_bits about 32_4x8").

Fixes: e0d232c2fc ("aco: implement nir_op_pack_32_4x8").  I
Suggested-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27972>
 2024-03-05 20:38:34 +00:00
Georg Lehmann 482137402a aco/ssa_elimination: check if pseudo scratch reg overwrittes regs used for v_cmpx opt 
Cc: mesa-stable

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27855>
 2024-03-05 20:16:21 +00:00
Georg Lehmann e7d6cd9216 aco/post-ra: track pseudo scratch sgpr/scc clobber 
Foz-DB Navi31:
Totals from 1439 (1.84% of 78112) affected shaders:
Instrs: 1994854 -> 1996650 (+0.09%)
CodeSize: 11376864 -> 11383384 (+0.06%)
Latency: 14996299 -> 14999317 (+0.02%); split: -0.00%, +0.02%
InvThroughput: 2061294 -> 2061518 (+0.01%); split: -0.00%, +0.01%

Cc: mesa-stable

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27855>
 2024-03-05 20:16:21 +00:00
Georg Lehmann 1eb067ee9f aco: store if pseudo instr needs scratch reg 
Cc: mesa-stable
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27855>
 2024-03-05 20:16:21 +00:00
Georg Lehmann bd93e8372d aco/post-ra: assume scc is going to be overwritten by phis at end of blocks 
Cc: mesa-stable
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27855>
 2024-03-05 20:16:21 +00:00
Georg Lehmann a5056b2f93 aco/post-ra: rename overwritten_subdword to allow additional uses 
Cc: mesa-stable
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27855>
 2024-03-05 20:16:21 +00:00
Georg Lehmann b0554ab0a1 aco: create pseudo instructions with correct struct 
Cc: mesa-stable
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27855>
 2024-03-05 20:16:21 +00:00
Job Noorman 8d0f9c8fcd ir3: fix returning false instead of NULL 
Fixes: 9de628b65c ("ir3: fold and/or and negations into branches")
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27986>
 2024-03-05 19:50:32 +00:00
Job Noorman 9cfc44532b ir3: fix freeing incorrect register in loops 
While processing loop back edges, current live defs were freed through
their def pointer instead of correctly using get_def(). This may cause
the wrong register being freed when the current live def was reloaded.

Fixes: 21cd9b9557 ("ir3: implement RA for predicate registers")
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27986>
 2024-03-05 19:50:32 +00:00
Yonggang Luo 1e97fded47 vulkan/runtime: Mark vk_default_dynamic_graphics_state to be private 
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27526>
 2024-03-05 19:05:00 +00:00
Yonggang Luo 2f57834d27 freedreno/vulkan: Use vk_dynamic_graphics_state_init instead of direct assignment 
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27526>
 2024-03-05 19:05:00 +00:00
Yonggang Luo db103c56ab treewide: Remove vulkan/runtime vulkan/util prefix in include path 
This is for unify the include style of shared vulkan headers

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27526>
 2024-03-05 19:05:00 +00:00
Mike Blumenkrantz ea9d87bf75 zink: call CmdSetRasterizationStreamEXT when using shader objects 
required by spec

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27990>
 2024-03-05 18:41:44 +00:00
Mike Blumenkrantz 0736c212b5 zink: fix PIPE_CAP_MAX_SHADER_PATCH_VARYINGS 
maxTessellationControlPerPatchOutputComponents is the per-patch limit,
maxTessellationControlPerVertexOutputComponents is the per-vertex limit

fixes #10750

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27990>
 2024-03-05 18:41:44 +00:00
Friedrich Vock 4c05ebf3a5 radv: Set SCRATCH_EN for RT pipelines based on dynamic stack size 
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27899>
 2024-03-05 18:15:00 +00:00
Mike Blumenkrantz ac4e60b9c9 lavapipe bump descriptor buffer address space limits 
lavapipe is the only driver that advertises the spec minimum, which is
stupidly small

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27989>
 2024-03-05 17:43:53 +00:00
Rob Clark 850267ef99 freedreno/a6xx: Add dual_color_blend_by_location 
Needed by unigine heaven.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27969>
 2024-03-05 16:53:29 +00:00
Rohan Garg c82edb4e8f anv: drop duplicated 3DSTATE_SLICE_TABLE_STATE_POINTERS emission 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27985>
 2024-03-05 15:49:41 +00:00
Georg Lehmann 1d8b2b159e nir/divergence_analysis: fix subgroup mask 
These depend on the subgroup invocation id, so they are divergent.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

Fixes: df86c5ffb3 ("nir: add divergence analysis pass.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27962>
 2024-03-05 14:52:17 +00:00
Georg Lehmann 230743da2e nir: remove rotate scope 
All other subgroup operations do not have a scope in NIR, so for consistency
rotate shouldn't have one either.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27964>
 2024-03-05 14:12:21 +00:00
Kenneth Graunke edf14f4b7c intel/brw: Unindent code after previous change 
I kept things indented in the previous patch to make the diffs easier to
read, but there's no reason to continue doing so.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27959>
 2024-03-05 12:03:31 +00:00
Kenneth Graunke 4c10613625 intel/brw: Remove SIMD lowering to a larger SIMD size 
On Gfx4, we had to emulate SIMD8 texturing with SIMD16 for some message
types.  This ceased to be a thing with Gfx5 and hasn't come up again.

So, we can simply assert that we are truly "SIMD splitting", and assume
that the lowered size is smaller than the original instruction size.
This avoids some mental complexity as we can always think of the split
instructions as taking apart, operating on, and recombining subsets of
the original values.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27959>
 2024-03-05 12:03:31 +00:00
Kenneth Graunke bb191e3af5 intel/brw: Call constant combining after copy propagation/algebraic 
This copy propagation can create MADs with immediates in src1, which
need to be cleaned up by constant combining (which puts them back in
VGRFs).

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27876>
 2024-03-05 11:39:26 +00:00
Kenneth Graunke e8ef184677 intel/brw: Make register coalescing obey the g112-g127 restriction 
opt_register_coalesce can sometimes unpleasantly coalesce both
SENDS payload sources into the larger of the two registers.
This can break the assumption that the VGRFs for sources 2-3
must occupy no more than 16 registers, so they fit in g112-127.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27876>
 2024-03-05 11:39:26 +00:00
Kenneth Graunke 1c1e79d75a intel/brw: Copy the smaller payload in fixup_sends_duplicate_payload 
Sometimes one source can be a larger register than the other, especially
since opt_register_coalesce can sometimes coalesce those sources into
larger registers.

Copy the smaller of mlen and ex_mlen.  It's less copying.

shader-db and fossil-db on Alchemist show 47 shaders affected with
small 1-2 instruction improvements each, and no regressions.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27876>
 2024-03-05 11:39:26 +00:00
Kenneth Graunke 91252c98a8 intel/brw: Add assertions that EOT messages live in g112+ 
The validator already catches this, but asserting here makes it easier
to catch the problem earlier in a debugger.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27876>
 2024-03-05 11:39:26 +00:00
Kenneth Graunke f6ac6c94a9 intel/brw: Handle SHADER_OPCODE_SEND without src[3] in copy prop 
We construct some SENDs with only 3 sources (such as FB writes).
This code could read out of bounds.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27876>
 2024-03-05 11:39:26 +00:00
Kenneth Graunke 49606ab067 intel/brw: Avoid copy propagating any fixed registers into EOTs 
We were handling FIXED_GRF, but we probably also ought to handle ATTR
(pushed inputs) and UNIFORM (pushed constants).  Just check if file
isn't VGRF to handle everything.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27876>
 2024-03-05 11:39:26 +00:00
Kenneth Graunke 97bf3d3b2d intel/brw: Replace CS_OPCODE_CS_TERMINATE with SHADER_OPCODE_SEND 
There's no need for special handling here, it's just a send message
with a trivial g0 header and descriptor.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27924>
 2024-03-05 11:16:20 +00:00
Patrick Lerda f93f215898 radeonsi/gfx10: fix main_shader_part_ngg_es memory leak 
Indeed, main_shader_part_ngg_es was not freed.

For instance, this issue is triggered on a radeonsi/gfx10 gpu with
"piglit/bin/arb_gpu_shader5-tf-wrong-stream-value -auto -fbo":
Direct leak of 1464 byte(s) in 1 object(s) allocated from:
    #0 0x7f17904b99a7 in calloc (/usr/lib64/libasan.so.6+0xb19a7)
    #1 0x7f1785d65ac2 in si_init_shader_selector_async ../src/gallium/drivers/radeonsi/si_state_shaders.cpp:3132
    #2 0x7f1783af67d8 in util_queue_thread_func ../src/util/u_queue.c:309
    #3 0x7f1783b51dfa in impl_thrd_routine ../src/c11/impl/threads_posix.c:67
    #4 0x7f178f69d38a  (/lib64/libc.so.6+0x8438a)

Indirect leak of 2024 byte(s) in 1 object(s) allocated from:
    #0 0x7f17904b97ef in __interceptor_malloc (/usr/lib64/libasan.so.6+0xb17ef)
    #1 0x7f1785d5443a in read_chunk ../src/gallium/drivers/radeonsi/si_state_shaders.cpp:221
    #2 0x7f1785d62cf5 in si_load_shader_binary ../src/gallium/drivers/radeonsi/si_state_shaders.cpp:293
    #3 0x7f1785d65255 in si_shader_cache_load_shader ../src/gallium/drivers/radeonsi/si_state_shaders.cpp:423
    #4 0x7f1785d65ef9 in si_init_shader_selector_async ../src/gallium/drivers/radeonsi/si_state_shaders.cpp:3169
    #5 0x7f1783af67d8 in util_queue_thread_func ../src/util/u_queue.c:309
    #6 0x7f1783b51dfa in impl_thrd_routine ../src/c11/impl/threads_posix.c:67
    #7 0x7f178f69d38a  (/lib64/libc.so.6+0x8438a)

Fixes: 8f72f137ad ("radeonsi/gfx10: add as_ngg variant for TES as ES to select Wave32/64")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27958>
 2024-03-05 10:50:22 +00:00
Christian Gmeiner 516a2a3a0e isaspec: encode: Constify bitset_params 
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27965>
 2024-03-05 07:29:08 +00:00
Christian Gmeiner 381d19d138 isaspec: encode: Constify encode.type 
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27965>
 2024-03-05 07:29:08 +00:00
Lionel Landwerlin dde2527afb anv: add support for VK_EXT_map_memory_placed 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27963>
 2024-03-05 07:03:13 +00:00
Lionel Landwerlin 6ad2a03ffd anv: remove some wrapping around mmap 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27963>
 2024-03-05 07:03:13 +00:00
Tapani Pälli 0df9571bfb crocus: make sure aux is disabled for memory objects 
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27948>
 2024-03-04 20:36:43 +02:00
Tapani Pälli 9d18cde8ed hasvk: make sure aux is disabled for memory objects 
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27948>
 2024-03-04 20:36:34 +02:00
Yiwei Zhang aaa2d13181 venus: add VK_KHR_fragment_shading_rate 
Notes:
- handle the property interop with VK_EXT_sample_locations
- handle the interop with pipeline creation

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27942>
 2024-03-04 10:11:16 -08:00
Yiwei Zhang 9edf180796 venus: sync protocol for VK_KHR_fragment_shading_rate 
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27942>
 2024-03-04 10:11:16 -08:00
Eric Engestrom 78ea3bb43d ci/deqp: use the proper gl/gles releases for deqp-gl*, deqp-gles*, deqp-egl 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27473>
 2024-03-04 16:53:58 +00:00
Eric Engestrom 8bb59f16ec ci/deqp-runner: inline never-used DEQP_VARIANT variable 
It has never been used, and we're about to change some of them and not others,
so we need to distinguish them.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27473>
 2024-03-04 16:53:58 +00:00
Eric Engestrom e9fb4d951b ci/deqp: split vk/gl/gles patches 
All files are identical copies for now, but this allows changing one
without touching the others.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27473>
 2024-03-04 16:53:58 +00:00
Eric Engestrom 74bcb91a91 ci/deqp: drop zlib url patch 
It's no longer necessary, and removing it now simplifies the diff later.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27473>
 2024-03-04 16:53:57 +00:00
Lionel Landwerlin f3b0330fbc anv: fix helper usage for CmdUpdateBuffer() 
We created a new helper for things that don't need to be indexed from
the dynamic state pool. This allocation got missed.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 82d772fa9b ("anv: create new helper for small allocations")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27966>
 2024-03-04 16:24:24 +00:00
Oskar Viljasaar f9acfeeb59 compiler/types: Fix glsl_dvec*_type() helpers 
Commit 90e364edb0 contained a typo in the glsl_dvec4_type() helper,
instead returning a glsl_ivec4_type. As an ivec4 is 2x smaller than
a dvec4, this also broke piglit sanity on crocus/hsw.

This also fixes the dvec2 helper, though it has not been specifically
tested anywhere.

Fixes: 90e364edb0 ("compiler/types: Add a few more helpers to get builtin types")

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27917>
 2024-03-04 15:22:32 +00:00