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291 Commits

Author SHA1 Message Date
Jordan Justen ab22fb488b intel/dev: Apply settings from hwconfig if devinfo::apply_hwconfig is set 
During debug builds, if apply_hwconfig is not set, then the devinfo
value will be compared with the hwconfig value. If they don't match
then a warning message will be logged to stderr.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13866>
 2022-01-19 00:29:35 +00:00
Jordan Justen 59f32c62c7 intel/dev: Set intel_device_info::apply_hwconfig for DG2 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13866>
 2022-01-19 00:29:35 +00:00
Jordan Justen a15f18c886 intel/dev: Add intel_device_info::apply_hwconfig 
This will be used to conditionally use hwconfig values to update
intel_device_info at runtime.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13866>
 2022-01-19 00:29:35 +00:00
Jordan Justen 0300351028 intel/dev: Print urb size with intel_dev_info 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13866>
 2022-01-19 00:29:35 +00:00
Jordan Justen 2dd78b9a4f intel/dev: Add intel_print_hwconfig_table() 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13866>
 2022-01-19 00:29:35 +00:00
Jordan Justen 3a119f0c6d intel/dev: Add intel_hwconfig_types.h from random post on the internet 
There is no spec for any of this, but we'll need this to interpret a
blob that the kernel is giving us.

Ref: https://lists.freedesktop.org/archives/intel-gfx/2021-September/277488.html
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13866>
 2022-01-19 00:29:35 +00:00
Jordan Justen 08a897fa38 intel/dev: Add max_threads_per_psd field to devinfo for gfx8+ 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13866>
 2022-01-19 00:29:35 +00:00
Lionel Landwerlin d3724de894 intel/dev,perf: Use a single timescale function 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
 2022-01-14 20:17:44 +00:00
Lionel Landwerlin e86ce98c6a intel/devinfo: deal with i915 topology query change 
i915 does not report slices accurately anymore on Gfx12.5+. Since this
is information we need to have for performance queries, we need to
rebuild it here.

v2: Remove invalid change to pixel pipes computations (Jordan)

v3: Fix index calculation (Curro)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14297>
 2022-01-14 12:01:05 +00:00
Lionel Landwerlin 6d73426d2a intel/devinfo: split out l3/pixelpipes counting 
v2: fix up subslice_total store (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> (v1)
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14297>
 2022-01-14 12:01:05 +00:00
Jordan Justen 7609e88d5f intel/devinfo: Adjust L3 banks for DG2 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Co-Authored-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14297>
 2022-01-14 12:01:05 +00:00
Lionel Landwerlin 5f3b0327b7 intel/dev: extract slice/subslice total computation 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14297>
 2022-01-14 12:01:05 +00:00
Jordan Justen 4f9141607f intel: Add device info for DG2 
Reworks:
 * Lionel: simulator_id
 * Rafael: has_llc
 * Merged Lionel's "intel/devinfo: store the different kind of DG2"

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14524>
 2022-01-13 09:48:51 +00:00
Jianxun Zhang f43c7185e0 intel: remove chipset_id 
The chipset_id should be named after i915 ioctl that's called
to get the device id. In user space this field holds pci device
id in reality. We now have a pci_device_id queried from drm
instead using the ioctl, so there is no much reason to keep
the chipset_id for the same purpose.

Signed-off-by: Jianxun Zhang <jianxun.zhang@linux.intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13936>
 2022-01-13 03:09:36 +00:00
Jianxun Zhang ddfa3924b3 intel: dump PCI info in intel_dev_info 
Dump PCI bus and device info so that we can easily identify output
in a multi-gpu system.

Signed-off-by: Jianxun Zhang <jianxun.zhang@linux.intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13936>
 2022-01-13 03:09:36 +00:00
Jianxun Zhang db8405670a intel: provide pci bus and dev info in base device struct 
Having PCI bus and dev info in the base struct
'intel_device_info' enables us to utilize the info across
multiple drivers for several purposes, such as computing
device uuids in a multi-gpu system.

Signed-off-by: Jianxun Zhang <jianxun.zhang@linux.intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13936>
 2022-01-13 03:09:36 +00:00
Lionel Landwerlin 8ef9350ff0 intel/devinfo: drop num_eus_per_subslice field 
This field is an average computation that is not actually useful for
any of our driver code.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14510>
 2022-01-12 12:53:21 +00:00
Lionel Landwerlin 5d5a1b660b intel/devinfo: add a helper to check for slice availability 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14510>
 2022-01-12 12:53:21 +00:00
Lionel Landwerlin 1c5b206366 intel/devinfo: printout devinfo struct size 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14510>
 2022-01-12 12:53:21 +00:00
Lionel Landwerlin 574ba30fb4 intel/devinfo: printout pixel pipes in info printout 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14510>
 2022-01-12 12:53:21 +00:00
Lionel Landwerlin d6c0d16791 intel/dev: fixup chv workaround 
We're using the wrong helper to get the subslice total count.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c24ba6cecb ("intel/dev: Handle CHV CS thread weirdness in get_device_info_from_fd")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14492>
 2022-01-11 19:02:57 +00:00
Francisco Jerez 054eb9f346 intel/dev: Implement DG2 restrictions requiring additional DSSes to be disabled. 
Note that this causes a geometry slice to be disabled if any DSS is
fused off within that slice, which may seem stricter than the BSpec
quotation implies, but testing shows that pixel pipes with any faulted
DSS don't work at all, and that using a slice with any faulted pixel
pipe leads to serious graphics corruption.

It would be better to query this geometry topology information from
the hardware instead of trying to reconstruct it here, but the kernel
interface for that is not available yet.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14436>
 2022-01-07 07:58:27 +00:00
Francisco Jerez e48c29acca intel/dev: Add support for pixel pipe subslice accounting on multi-slice GPUs. 
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14436>
 2022-01-07 07:58:27 +00:00
Francisco Jerez f3274e94fd intel/dev: Fix size of device info num_subslices array. 
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14436>
 2022-01-07 07:58:27 +00:00
Lionel Landwerlin eca7b24e74 intel/devinfo: adjust subslice array size 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14324>
 2021-12-28 14:22:53 -08:00
Jason Ekstrand 88e97d75d0 intel/dev: Add gtt_size to devinfo 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13647>
 2021-12-11 05:05:19 +00:00
Jason Ekstrand 4fa58d27a5 intel/fs,vec4: Drop support for shader time 
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14056>
 2021-12-10 21:20:47 +00:00
Lionel Landwerlin 365903ebbb intel/debug: reclaim 7 unused bits from classic driver 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14060>
 2021-12-06 09:44:04 +02:00
Caio Oliveira 76f55d7556 intel: Add INTEL_DEBUG=task,mesh 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>
 2021-12-04 00:41:46 +00:00
Dylan Baker cdde031ac2 classic/i965: Remove driver 
Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10153>
 2021-12-03 23:53:06 +00:00
Jordan Justen 29c2f32a57 intel/dev: Add platform enum with DG2 G10 & G11 
Based on Lionel's "intel/devinfo: store the different kind of DG2".

Ref: 361b3fee3c ("intel: move away from booleans to identify platforms")
Ref: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=9e22cfc5e9b92556a56d8a564cdab31045f29010
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13797>
 2021-11-15 21:39:27 +00:00
Jason Ekstrand 0b2b9b49af anv: Pull aperture size from devinfo 
Reviwed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13610>
 2021-11-09 02:48:24 +00:00
Lionel Landwerlin c572adceaa intel/dev: also test crocus & i915 pci-ids 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12981>
 2021-11-08 16:48:06 +00:00
Lionel Landwerlin 361b3fee3c intel: move away from booleans to identify platforms 
v2: Drop changes around GFX_VERx10 == 75 (Luis)

v3: Replace
   (GFX_VERx10 < 75 && devinfo->platform != INTEL_PLATFORM_BYT)
   by
   (devinfo->platform == INTEL_PLATFORM_IVB)
   Replace
   (devinfo->ver >= 5 || devinfo->platform == INTEL_PLATFORM_G4X)
   by
   (devinfo->verx10 >= 45)
   Replace
   (devinfo->platform != INTEL_PLATFORM_G4X)
   by
   (devinfo->verx10 != 45)

v4: Fix crocus typo

v5: Rebase

v6: Add GFX3, ILK & I965 platforms (Jordan)
    Move ifdef to code expressions (Jordan)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12981>
 2021-11-08 16:48:06 +00:00
Lionel Landwerlin 349bfb7275 intel/devinfo: fix wrong offset computation 
A bit difficult to find what commit introduced the issue because of
all the renaming, but it was my bug :)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10015>
 2021-11-05 10:22:18 +00:00
Lionel Landwerlin 718c97d525 intel/devinfo: use compatible type for ARRAY_SIZE 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10015>
 2021-11-05 10:22:18 +00:00
Lionel Landwerlin a543a94404 intel/dev: fix subslice/eu total computations with some fused configurations 
When a device has its first slice/subslice fused off, we can't use the
number of slices/subslices to iterate the mask array.

v2: Fix spelling (Marcin)
    Use size_t for iterator (Marcin)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reported-by: Matt Roper <matthew.d.roper@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5601
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10015>
 2021-11-05 10:22:18 +00:00
Lionel Landwerlin e10c641f00 intel/dev: reuse internal functions to set mask 
Rather than having 2 paths to set the slice/subslice/eu masks, reuse
the other internal functions. This simplifies finding bugs within this
code :

  * If we have i915 query topology support, update_from_topology() is
    called.

  * If we don't have query topology support but we have getparam for
    slice/subslice/EU, we generate a topology data and call
    update_from_topology()

  * If we have no kernel support to query any kind of topology, we
    generate the values return by the kernel for slice/subslice/EU and
    call update_from_masks() which in turns calls
    update_from_topology()

v2: Fixup typo (Adam)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10015>
 2021-11-05 10:22:18 +00:00
Lionel Landwerlin d7c6a90c26 intel/dev: don't forget to set max_eu_per_subslice in generated topology 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10015>
 2021-11-05 10:22:18 +00:00
Lionel Landwerlin d1db5d562a intel/dev: fix HSW GT3 number of subslices in slice1 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10015>
 2021-11-05 10:22:18 +00:00
Caio Oliveira ecba8178bd intel/dev: Add an intel_device_info::has_mesh_shading bit 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13660>
 2021-11-04 14:41:06 -07:00
Jason Ekstrand 953a4ca6fe intel: Add has_bit6_swizzle to devinfo 
There's no good reason to have this rather complex check in three
drivers.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13636>
 2021-11-04 18:51:04 +00:00
Lionel Landwerlin 3dda80fcf6 intel/dev: printout timestamp period 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13571>
 2021-10-28 13:16:56 +03:00
Jordan Justen 64157c706e intel/dev/test: Assert (verx10 / 10) == ver 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13568>
 2021-10-28 09:19:07 +00:00
Marcin Ślusarz d05f7b4a2c intel: fix INTEL_DEBUG environment variable on 32-bit systems 
INTEL_DEBUG is defined (since 4015e1876a) as:

 #define INTEL_DEBUG __builtin_expect(intel_debug, 0)

which unfortunately chops off upper 32 bits from intel_debug
on platforms where sizeof(long) != sizeof(uint64_t) because
__builtin_expect is defined only for the long type.

Fix this by changing the definition of INTEL_DEBUG to be function-like
macro with "flags" argument. New definition returns 0 or 1 when
any of the flags match.

Most of the changes in this commit were generated using:
for c in `git grep INTEL_DEBUG | grep "&" | grep -v i915 | awk -F: '{print $1}' | sort | uniq`; do
    perl -pi -e "s/INTEL_DEBUG & ([A-Z0-9a-z_]+)/INTEL_DBG(\1)/" $c
    perl -pi -e "s/INTEL_DEBUG & (\([A-Z0-9_ |]+\))/INTEL_DBG\1/" $c
done
but it didn't handle all cases and required minor cleanups (like removal
of round brackets which were not needed anymore).

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13334>
 2021-10-15 19:55:14 +00:00
Caio Marcelo de Oliveira Filho 37f03e89f2 intel: Add and use max_constant_urb_size_kb 
This knowledge was repeated in multiple places so move the values to
intel_device_info struct.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13014>
 2021-09-27 20:51:28 +00:00
Jordan Justen c746bf4c5c intel/dev: Add display_ver and set adl-p to 13 
Ref: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12908
Cc: mesa-stable
Fixes: e435511b58 ("intel/dev: Add device info for ADL GT2")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12973>
 2021-09-22 02:32:05 -07:00
Jordan Justen 99f9075063 Revert "intel/dev: Add display_ver and set adl-p to 13" 
This reverts commit c81acd365e.
 2021-09-21 03:39:31 -07:00
Jordan Justen c81acd365e intel/dev: Add display_ver and set adl-p to 13 
Cc: mesa-stable
Fixes: e435511b58 ("intel/dev: Add device info for ADL GT2")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12908>
 2021-09-21 02:49:04 -07:00
Jordan Justen 4620f8334f intel/dev: Add is_dg2 to devinfo 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12711>
 2021-09-14 02:51:03 +00:00