Commit Graph

186467 Commits

Author SHA1 Message Date
Corentin Noël 89d709a43e virgl: Propagate the GL_MAX_stage_SHADER_STORAGE_BLOCKS for each stage
Some hardware have a higher number in the computer stage than in others, let's
simply propagate everything when possible.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12003

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31666>
2024-11-08 12:26:06 +00:00
David Rosca 79b12001fd radeonsi/vcn: Stop clearing decode internal buffers
FW will clear them if needed.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31677>
2024-11-08 09:48:54 +00:00
David Rosca 1f00dfd1a7 radeonsi: Support PIPE_VIDEO_CAP_SKIP_CLEAR_SURFACE
Starting with .59 amdgpu now clears VRAM on allocation, so we don't
need to clear video buffers which are always allocated in VRAM.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31677>
2024-11-08 09:48:54 +00:00
David Rosca b4b74617ae frontends/vdpau: Support skip clear on surface creation
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31677>
2024-11-08 09:48:54 +00:00
David Rosca 5df9097c95 frontends/va: Support skip clear on surface creation
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31677>
2024-11-08 09:48:54 +00:00
David Rosca 76df53f59b gallium: Add PIPE_VIDEO_CAP_SKIP_CLEAR_SURFACE
Used to skip calling clear_render_target when creating surface.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31677>
2024-11-08 09:48:54 +00:00
Karol Herbst 47a1565c3d nv/codegen: Do not use a zero immediate for tex instructions
They aren't always legal for tex instructions, specifically for TXQ when
an actual source is needed.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11999
Fixes: 85a31fa1fc ("nv50/ir/nir: fix txq emission on MS textures")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32043>
2024-11-08 09:18:54 +00:00
David Rosca 2c3dd2a37d frontends/va: Add minus_1 to AV1 render_width/height
Rename to match the spec and to match the actual value.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31977>
2024-11-08 08:39:49 +00:00
David Rosca 7f2624e6ae radeonsi/vcn: Fix coding AV1 render size
This is only header metadata hint, so it should be passed directly
from packed headers to output. Also fix the value as render_width from
frontend is actually render_width_minus_1 (and same for height).

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31977>
2024-11-08 08:39:49 +00:00
Lionel Landwerlin 3ecf2a0518 anv: fix extent computation in image->image host copies
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 0317c44872 ("anv: add VK_EXT_host_image_copy support")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32027>
2024-11-07 22:44:41 +00:00
Eric Engestrom 625ad5bc52 freedreno/ci: add more flakes seen recently
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32045>
2024-11-07 21:49:29 +01:00
Eric Engestrom a1b309a177 broadcom/ci: add more flakes seen recently
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32045>
2024-11-07 21:49:29 +01:00
Eric Engestrom e83613d906 radv/ci: add more flakes seen recently
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32045>
2024-11-07 21:49:29 +01:00
Eric Engestrom 9229bcaf13 radeonsi/ci: add more flakes seen recently
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32045>
2024-11-07 21:49:29 +01:00
Chia-I Wu 879ec4270d panvk: fix dummy sampler handle for vs
When there is no dynamic buffer, create_copy_table early returns.  Make
sure dummy_sampler_handle is still set.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32018>
2024-11-07 17:35:12 +00:00
Chia-I Wu 7e737500bd panvk: fix missing same-subqueue wait for CmdWaitEvents2
CmdSetEvent2 does not call cs_wait_slots.  CmdWaitEvents2 should wait
for the syncobj even on the same subqueue.  To that goal, update
collect_cs_deps to not clear self from wait_subqueue_mask.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31997>
2024-11-07 17:15:12 +00:00
Benjamin Herrenschmidt e1098310da dril: Fixup order of pixel formats in drilConfigs
Having the RGB* formats before the BGR* formats in the table causes
problems where under some circumstances, some applications end up
with the wrong colors.

The repro case for me is: Xvnc + mutter + chromium

There was an existing comment in dri_fill_in_modes() which explained
the problem. This was lost when dril_target.c was created.

Fixes: ec7afd2c24 ("dril: rework config creation")
Fixes: 3de62b2f9a ("gallium/dril: Compatibility stub for the legacy DRI loader interface")

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31950>
2024-11-07 12:12:57 +00:00
Samuel Pitoiset 9cc07bbd09 radv: mark some GFX6-7 GPUs as Vulkan 1.3 conformant
It's the first time RADV is Vulkan conformant on GFX6-7! Some chips
are missing because we don't have access but most of the GFX6-7 GPUs
are covered.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32022>
2024-11-07 11:50:10 +00:00
Mary Guillemard 125223b391 panvk: Ensure that render_info is not null in force_fb_preload
This fixes various crashes that I saw with occlusion query tests.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Fixes: ba2c7fd00a ("panvk: use force_fb_preload for unaligned preload")
Fixes: c108dfc930 ("panvk: force_fb_preload should insert a barrier")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32024>
2024-11-07 10:26:48 +00:00
Christian Gmeiner f4e8849d79 etnaviv: Fix incorrect pipe_nn creation
When etna_screen_create(..) is called with gpu != NULL and npu == NULL,
screen->pipe_nn is incorrectly set up. This leads to an unintended
stream configuration for compute-only contexts, as determined by

  pipe = (compute_only && screen->pipe_nn) ? screen->pipe_nn : screen->pipe;

To address this, extend the gpu != npu condition by adding a check for
npu != NULL to ensure pipe_nn is only initialized when both gpu and npu
are provided.

Fixes: a4653587cc ("etnaviv: Add a separate NPU pipe")
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32025>
2024-11-07 10:02:48 +00:00
David Heidelberg 9f5ee44986 freedreno: python fixes
Acked-by: Rob Clark <robclark@freedesktop.org>
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29390>
2024-11-07 09:15:54 +00:00
Samuel Pitoiset b67218645d radv: save the trap handler report in the HOME directory
It's similar to where GPU hang reports are saved.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31988>
2024-11-07 09:28:16 +01:00
Derek Foreman 71cc22504f adv+zink/ci: Add a recent flake
Signed-off-by: Derek Foreman <derekf@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26150>
2024-11-07 00:03:23 +00:00
Derek Foreman c26ab1aee1 vulkan/wsi/wayland: Pace frames with commit-timing-v1
Instead of using frame callbacks - which may stop firing if our surface is
occluded - use the new commit-timing-v1 protocol in combination with the
presentation feedback protocol.

If the required protocols are unavailable, or the environment variable
MESA_VK_WSI_DEBUG contains "nowlts", we fall back to frame callback
based pacing behaviour.

Signed-off-by: Derek Foreman <derek.foreman@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26150>
2024-11-07 00:03:23 +00:00
Derek Foreman d052b0201e vulkan/wsi/wayland: Use fifo protocol for FIFO
The fifo protocol allows us to ensure that a compositor presents
an image that we submit to it. Use this to reliably implement FIFO
semantics.

Note: On systems where the fifo protocol is available an occluded
surface may find itself unthrottled when previously it would have
been frozen.

Signed-off-by: Derek Foreman <derek.foreman@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26150>
2024-11-07 00:03:23 +00:00
Derek Foreman 50d3fb65db vulkan/wsi/wayland: Use presentation timing v2 when available
Presentation timing v2 gives us a usable value instead of a 0 when
VRR is in use. Prefer that if available.

Signed-off-by: Derek Foreman <derek.foreman@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26150>
2024-11-07 00:03:23 +00:00
Chia-I Wu c108dfc930 panvk: force_fb_preload should insert a barrier
Preloading is effectively texel fetching.  When we force preloading, we
need to insert a barrier for the feedback loop.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31895>
2024-11-06 15:23:45 -08:00
Chia-I Wu ba2c7fd00a panvk: use force_fb_preload for unaligned preload
Extend force_fb_preload to take an optional VkRenderingInfo.  When it is
non-NULL, this is the unaligned preload and force_fb_preload should
clear attachments.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31895>
2024-11-06 15:23:41 -08:00
Felix DeGrood bf96702985 intel/measure: increase size of filename malloc to account for \0
Corrects regression caused by prior commit that created memory
overwrite by not mallocing enough space for filename string.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32013>
2024-11-06 22:12:29 +00:00
Sergi Blanch Torne 918978f525 Nightly full job for a630-gles-asan
The a630-gles-asan has a significant fraction, that's a trade-off for the
pre-merge, but then we need a full test in the nightly run.

The a630-gles-asan-full job usually takes 40-50 minutes. Therefore, the 20
minutes timeout is increased to 1h. The parallel feature is not used because
the nightly run is, with the introduction of this job, using 4 of the 6
devices available.

Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com>
Reviewed-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31713>
2024-11-06 21:44:44 +00:00
Pavel Ondračka f59f322efc r300/ci: fails update after recent piglit uprev
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31745>
2024-11-06 21:10:21 +00:00
Pavel Ondračka 5480831e5e r300: add driconf math mode override for Unigine Tropics and Oilrush
Fixes rendering in both apps. Specifically they want the ME_RECIP_FF
opcode. Figured out by Filip Gawin.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/332
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31745>
2024-11-06 21:10:21 +00:00
Pavel Ondračka be595d0e52 r300: remove wrong Unigine Sanctuary driconf override
I used this for testing when adding r300 driconf support
and it was commited by mistake.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31745>
2024-11-06 21:10:21 +00:00
Pavel Ondračka 584ac64670 r300: add switch to support IEEE and FF math opcodes
Also add support for the 0*NaN = NaN IEEE compliant multiply on R500.
All of this is disabled by default, but can be enabled with a
RADEON_DEBUG variable or alternativelly with a driconf tweak.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31745>
2024-11-06 21:10:21 +00:00
Jesse Natalie 26fc1ea9e5 dzn: Clean up dri options cache
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32011>
2024-11-06 20:53:13 +00:00
Rhys Perry 215c44c124 aco: apply extract to v_cvt_f32_ubyte0
No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31762>
2024-11-06 19:31:20 +00:00
Rhys Perry f1a932bc29 aco: apply extract to p_extract_vector
fossil-db (navi21):
Totals from 46 (0.06% of 79395) affected shaders:
Instrs: 80126 -> 79944 (-0.23%); split: -0.27%, +0.04%
CodeSize: 486860 -> 485668 (-0.24%); split: -0.31%, +0.06%
Latency: 1615395 -> 1614218 (-0.07%); split: -0.07%, +0.00%
InvThroughput: 705479 -> 705013 (-0.07%); split: -0.07%, +0.00%
Copies: 18934 -> 18797 (-0.72%); split: -0.98%, +0.25%
VALU: 52452 -> 52268 (-0.35%); split: -0.41%, +0.06%
SALU: 17253 -> 17255 (+0.01%); split: -0.02%, +0.03%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31762>
2024-11-06 19:31:20 +00:00
Rhys Perry 6cb9d39bc2 aco: combine extracts with sub-dword definitions
fossil-db (navi21):
Totals from 23 (0.03% of 79395) affected shaders:
Instrs: 55133 -> 55099 (-0.06%)
CodeSize: 335744 -> 335512 (-0.07%)
Latency: 1709146 -> 1709031 (-0.01%)
InvThroughput: 613788 -> 613713 (-0.01%)
Copies: 14405 -> 14407 (+0.01%); split: -0.03%, +0.04%
VALU: 37038 -> 37000 (-0.10%)
SALU: 11125 -> 11131 (+0.05%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31762>
2024-11-06 19:31:20 +00:00
Rhys Perry 30af7ae44f aco: add and use apply_extract_twice helper
This will be used in the next commit.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31762>
2024-11-06 19:31:20 +00:00
Rhys Perry 05d0fa894e aco: allow applying sign-extended sel to p_extract more often
In the case of v1=p_extract(v1=p_extract(src, 0, 16, 1), 0, 32, 0).
When we apply extracts with sub-dword definitions, this will also
include v2b=p_extract(v2b=p_extract(src, 0, 8, 1), 0, 16, 0).

No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31762>
2024-11-06 19:31:20 +00:00
Rhys Perry e47bc3e750 aco: shrink code size of some p_extract
fossil-db (navi21):
Totals from 37 (0.05% of 79395) affected shaders:
CodeSize: 2048204 -> 2047836 (-0.02%)

fossil-db (navi31):
Totals from 307 (0.39% of 79395) affected shaders:
CodeSize: 3075732 -> 3065236 (-0.34%); split: -0.34%, +0.00%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31762>
2024-11-06 19:31:20 +00:00
Rhys Perry d285333800 aco: add a bit more p_extract/p_insert validation
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31762>
2024-11-06 19:31:20 +00:00
Rhys Perry d3ac69f79b aco: handle SGPR limitations when applying extract
We were already doing this, but missing it in a few places.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31762>
2024-11-06 19:31:20 +00:00
Rhys Perry 07e28dad75 aco: disallow p_extract(,,32,)
Nothing uses these.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31762>
2024-11-06 19:31:20 +00:00
Rhys Perry f528597906 aco: check for SDWA before applying extract to lshl/cvt_f32
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31762>
2024-11-06 19:31:20 +00:00
Rhys Perry 6ce51ea168 aco/gfx11: fix v1b=p_extract(src, 0, 16, 0)
This is weird, but the SDWA path supports this.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31762>
2024-11-06 19:31:20 +00:00
Rhys Perry da5c5a3edd nir/algebraic: add bit-size check to extract_u8 pattern
This only worked when "a" was 16-bit because a pattern above replaced the
shift.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31762>
2024-11-06 19:31:20 +00:00
Rhys Perry b318fe47e9 aco: don't byte align global VMEM loads if it might be unsafe
Using the byte align path can be unsafe even when 12 byte loads are
supported.

fossil-db (navi21):
Totals from 185 (0.23% of 79395) affected shaders:
Instrs: 391501 -> 391575 (+0.02%); split: -0.03%, +0.05%
CodeSize: 2147336 -> 2147672 (+0.02%); split: -0.03%, +0.05%
Latency: 3762613 -> 3860941 (+2.61%); split: -0.01%, +2.62%
InvThroughput: 871429 -> 888013 (+1.90%); split: -0.08%, +1.98%
VClause: 9712 -> 10210 (+5.13%)
Copies: 53775 -> 53010 (-1.42%); split: -1.46%, +0.04%
VALU: 254009 -> 252146 (-0.73%)
SALU: 56698 -> 56699 (+0.00%); split: -0.00%, +0.00%
VMEM: 18503 -> 19601 (+5.93%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Fixes: 391bf3ea30 ("aco: don't expand smem/mubuf global loads")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31807>
2024-11-06 19:07:16 +00:00
Job Noorman dc47ecc9ac ir3: merge is_reg_gpr and reg_gpr
These two helpers were basically doing the same thing so no point in
having them both around.

Signed-off-by: Job Noorman <job@noorman.info>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32000>
2024-11-06 17:00:25 +00:00
Marek Olšák 2352fcd5b4 nir/lower_clip_disable: handle non-scalar store intrinsics
It only supported scalar intrinsics because it was written before
nir_opt_vectorize_io existed. The introduction of nir_opt_vectorize_io
exposes this issue. The direct path has been tested. The indirect path
hasn't. That's fine because if we see a CLIP_DIST failure with indirect
in the future, this pass is likely the cause.

This is a prerequisite for enabling nir_opt_varyings for all gallium
drivers.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31994>
2024-11-06 15:51:51 +00:00