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Author SHA1 Message Date
Michel Dänzer fdc1c61306 Revert "util: Use persistent array of index entries" 
This reverts commit 031f2c2a69.

It broke the macOS build.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12083
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32078>
 2024-11-14 14:20:18 +00:00
Michel Dänzer 66d68263f8 Revert "util/mesa-db: Further simplify mesa_db_compact" 
This reverts commit 92893309bc.

Need to revert this as well for the next revert.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32078>
 2024-11-14 14:20:18 +00:00
Lionel Landwerlin 5cfd841dda anv: fix descriptor asserts 
Lots of tests are hitting the assert, one in particular :

dEQP-VK.binding_model.mutable_descriptor.single.switches.sampler_combined_image_sampler.update_copy.nonmutable_source.normal_source.pool_same_types.pre_update.no_array.comp

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: b6d11ba5b4 ("anv: Protect memcpy/memset/qsort calls against NULL arguments")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32133>
 2024-11-14 13:45:19 +00:00
Jose Maria Casanova Crespo 07f44ecd31 rpi4/ci: mark another flaky timeline_semaphore test 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32135>
 2024-11-14 12:54:44 +01:00
Danylo Piliaiev b501cbf153 nir/nir_opt_offsets: Do not fold load/store with const offset > max 
When (off_const > max) there is a wrap around uint when calling
try_extract_const_addition.
Exit early since folding doesn't make sense in this case.

Cc: mesa-stable

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32118>
 2024-11-14 10:22:39 +00:00
Friedrich Vock 73d513c5be vulkan/rmv: Correctly set heap size 
RMV expects the size to be in bits 5-68, not 4-68.

Fixes: 845792db ("vulkan: Add RMV file exporter")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31903>
 2024-11-14 09:11:25 +00:00
Lionel Landwerlin a21cd8c5b6 brw: allocate physical register sizes for spilling 
All of the spilling code should work with physical register units
because for example SEND messages will expect a physical register as
destination.

So always allocate a full physical register for the spilled/unspilled
values and adjust the offsets of the registers to physical sizes too.

Cc: mesa-stable
Fixes: aa494cba ("brw: align spilling offsets to physical register sizes")
Closes: mesa/mesa#11967

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Found-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32124>
 2024-11-14 08:44:03 +00:00
Boris Brezillon d13bcd1daf pan/ci: Move g610-vk jobs to post-merge CI 
The g610-vk jobs are just too unstable to be pre-merge jobs. Let's keep
them as post-merge so people can still execute them manually if they
care.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32129>
 2024-11-14 08:16:36 +00:00
David Rosca dcfc956521 radv/video: Override pic_init_qp_minus26 in PPS 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31418>
 2024-11-14 07:52:56 +00:00
David Rosca d166bb5dd1 radv/video: Use 64x16 alignment for HEVC encode 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31418>
 2024-11-14 07:52:56 +00:00
David Rosca d1c1a33b35 radv/video: Avoid selecting rc layer over maximum 
Vulkan spec doesn't say if this is allowed or not, but trying
to do this will hang.

Fixes: 4a19047d32 ("radv/video: Select temporal layer when encoding each frame")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31418>
 2024-11-14 07:52:56 +00:00
David Rosca e941acfb9d radv/video: Report correct encodeInputPictureGranularity 
Only aligned size can be encoded.

Fixes: 54d499818c ("radv/video: add initial support for encoding with h264.")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31418>
 2024-11-14 07:52:56 +00:00
David Rosca e4ec135d8b radv/video: Fix HEVC slice control 
This needs to use aligned size, otherwise it will output two
slices when the size is not 64 aligned.

Fixes: 967e4e09de ("radv/video: add h265 encode support")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31418>
 2024-11-14 07:52:56 +00:00
David Rosca 6a121f1507 radv/video: Fix H264 slice control 
This needs to use aligned size, otherwise it will output two
slices when the size is not 16 aligned.

Fixes: 54d499818c ("radv/video: add initial support for encoding with h264.")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31418>
 2024-11-14 07:52:56 +00:00
Caio Oliveira 15ea28b835 intel/executor: Fix exec_size in @read macro for Xe2 
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32122>
 2024-11-14 05:31:03 +00:00
Matt Turner b3a14d7b91 intel: Avoid unaligned pointer access 
Avoids the sanitizer error:

```
../src/intel/common/intel_debug_identifier.c:122:15: runtime error: member access within misaligned address 0x7f5ca8b32051 for type 'struct intel_debug_block_base', which requires 4 byte alignment
0x7f5ca8b32051: note: pointer points here
 66 30 29  00 03 00 00 00 10 00 00  00 00 00 00 00 00 00 00  00 01 00 00 00 08 00 00  00 00 00 00 00
              ^
```

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32098>
 2024-11-14 01:05:02 +00:00
Matt Turner 1f3e24f4f3 anv: Avoid null ptr dereference 
Avoids the sanitizer error:

```
../src/intel/vulkan/anv_instance.c:266:37: runtime error: member access within null pointer of type 'struct anv_instance'
```

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32098>
 2024-11-14 01:05:01 +00:00
Matt Turner b6d11ba5b4 anv: Protect memcpy/memset/qsort calls against NULL arguments 
Avoids sanitizer errors like:

```
../src/intel/vulkan/anv_pipeline_cache.c:409:4: runtime error: null pointer passed as argument 1, which is declared to never be null
../src/intel/vulkan/anv_descriptor_set.c:696:4: runtime error: null pointer passed as argument 1, which is declared to never be null
../src/intel/vulkan/anv_descriptor_set.c:2709:10: runtime error: null pointer passed as argument 1, which is declared to never be null
../src/intel/vulkan/anv_descriptor_set.c:2709:10: runtime error: null pointer passed as argument 2, which is declared to never be null
```

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32098>
 2024-11-14 01:05:01 +00:00
Matt Turner 6e544214d5 vulkan: Skip memcpy() call if passed null pointers 
Avoids sanitizer errors like:

```
../src/intel/vulkan/anv_pipeline_cache.c:406:4: runtime error: null pointer passed as argument 1, which is declared to never be null
../src/intel/vulkan/anv_pipeline_cache.c:406:4: runtime error: null pointer passed as argument 2, which is declared to never be null
../src/intel/vulkan/anv_pipeline_cache.c:417:4: runtime error: null pointer passed as argument 2, which is declared to never be null
../src/intel/vulkan/anv_pipeline_cache.c:435:4: runtime error: null pointer passed as argument 1, which is declared to never be null
../src/intel/vulkan/anv_pipeline_cache.c:435:4: runtime error: null pointer passed as argument 2, which is declared to never be null
../src/intel/vulkan/anv_pipeline_cache.c:439:4: runtime error: null pointer passed as argument 1, which is declared to never be null
../src/intel/vulkan/anv_pipeline_cache.c:439:4: runtime error: null pointer passed as argument 2, which is declared to never be null
../src/intel/vulkan/anv_pipeline_cache.c:443:4: runtime error: null pointer passed as argument 1, which is declared to never be null
../src/intel/vulkan/anv_pipeline_cache.c:443:4: runtime error: null pointer passed as argument 2, which is declared to never be null
../src/intel/vulkan/anv_pipeline_cache.c:447:4: runtime error: null pointer passed as argument 1, which is declared to never be null
../src/intel/vulkan/anv_pipeline_cache.c:447:4: runtime error: null pointer passed as argument 2, which is declared to never be null
```

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32098>
 2024-11-14 01:05:01 +00:00
David Heidelberg d21f7f75ff llvmpipe: align with u_cpu_detect struct changes 
Cc: mesa-stable # 24.3
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31998>
 2024-11-13 23:33:15 +00:00
David Heidelberg 962b996d4c util: drop XOP detection code 
Introduced in 2013 with prospect of being used in future.
... 11 years later.

Fixes: 4b45b61fef ("util: add avx2 and xop detection to cpu detection code") # 24.3
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31998>
 2024-11-13 23:33:15 +00:00
David Heidelberg ca947e1295 util: Drop ancient Intel CPU detection 
We don't use it for anything.

Cc: mesa-stable # 24.3
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31998>
 2024-11-13 23:33:15 +00:00
David Heidelberg a78c2bf2a4 util: Remove MMX/MMXext detection code 
Currently pointless, Pentium II or Celeron and later has SSE.

Cc: mesa-stable # 24.3
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31998>
 2024-11-13 23:33:15 +00:00
David Heidelberg ae85e6920c util: Drop 3Dnow optimisation leftovers 
Fixes: a3218e65d1 ("mesa: remove long dead 3Dnow optimisation") # 24.3
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31998>
 2024-11-13 23:33:15 +00:00
Timothy Arceri 59b2549279 glsl/nir: fix function cloning at link time 
As per the code comment added in this commit the nir produced from
glsl to nir doesn't always keep function declarations before the
code that calls them e.g. calls from within other function
implementations. The change in this commit works around this problem by
first cloning all function declarations in a first pass, then cloning
the implementations in a second pass once we have filled the remap
table.

Fixes: cbfc225e2b ("glsl: switch to a full nir based linker")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12115

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32100>
 2024-11-13 22:47:50 +00:00
Eric Engestrom 6a6e37728d turnip/ci: document regression 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32117>
 2024-11-13 17:14:06 +00:00
Samuel Pitoiset b4b5f9eeb0 radv,aco: dump VGPRS from the trap handler shader 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32090>
 2024-11-13 15:27:54 +00:00
Samuel Pitoiset 132b7a85c7 aco: drop the second M0 operand for s_set_gpr_idx_on 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32090>
 2024-11-13 15:27:54 +00:00
Samuel Pitoiset c712555a9f aco: save/restore VGPRS on GFX8 in the trap handler shader 
This will be needed for dumping VGPRs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32090>
 2024-11-13 15:27:54 +00:00
Samuel Pitoiset a77af57e83 aco: use all invocations from the current wave in the trap handler 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32090>
 2024-11-13 15:27:54 +00:00
Samuel Pitoiset 034014a165 aco: restore m0/exec before exiting the trap handler 
Dumping VGPRs will overwrite m0 and exec and they need to be restored
if we want to return to the shader.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32090>
 2024-11-13 15:27:53 +00:00
Samuel Pitoiset 185a165a85 aco: fix validation for v_movrels_b32 and friends 
m0 is the second operand.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32090>
 2024-11-13 15:27:53 +00:00
Samuel Pitoiset 40b343bbee aco: add a new variant for vop1() with two operands 
For v_movrels_b32 and friends which need a second operand for m0.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32090>
 2024-11-13 15:27:53 +00:00
Samuel Pitoiset f4cf6a71ed aco: use a 64-bit mov to save exec in the trap handler shader 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32090>
 2024-11-13 15:27:53 +00:00
Rhys Perry 7d4cc04156 radv,ac/nir: split global access using nir_lower_mem_access_bit_sizes 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31904>
 2024-11-13 12:59:26 +00:00
Rhys Perry 17cc8a5a54 aco: remove load byte_align 
8/16-bit loads given to instruction selection now always use VMEM and
scalar load instructions unless alignment easily allows a vector load.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31904>
 2024-11-13 12:59:26 +00:00
Rhys Perry 8fdc5d7f9f radv,ac/nir: lower sub-dword loads using nir_lower_mem_access_bit_sizes 
fossil-db (navi21):
Totals from 427 (0.54% of 79395) affected shaders:
Instrs: 2939637 -> 2937224 (-0.08%); split: -0.08%, +0.00%
CodeSize: 15982272 -> 15969880 (-0.08%); split: -0.08%, +0.00%
Latency: 21128645 -> 21125738 (-0.01%); split: -0.04%, +0.03%
InvThroughput: 5626811 -> 5626220 (-0.01%); split: -0.03%, +0.02%
SClause: 65771 -> 65731 (-0.06%); split: -0.07%, +0.00%
Copies: 243247 -> 242917 (-0.14%); split: -0.14%, +0.01%
Branches: 100089 -> 100085 (-0.00%)
PreSGPRs: 17879 -> 18118 (+1.34%)
VALU: 1899641 -> 1899278 (-0.02%)
SALU: 468508 -> 466469 (-0.44%)
SMEM: 84305 -> 84291 (-0.02%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31904>
 2024-11-13 12:59:26 +00:00
Rhys Perry d3ae1842a2 aco,ac/nir: flag loads to use smem in NIR 
This pass will be re-used later.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31904>
 2024-11-13 12:59:26 +00:00
Rhys Perry 7fe4f4c14c nir_lower_mem_access_bit_sizes: support load_constant 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31904>
 2024-11-13 12:59:26 +00:00
Rhys Perry 45c1280d2c nir_lower_mem_access_bit_sizes: pass access to callback 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31904>
 2024-11-13 12:59:26 +00:00
Rhys Perry 61752152f7 nir_lower_mem_access_bit_sizes: add nir_mem_access_shift_method 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31904>
 2024-11-13 12:59:26 +00:00
Rhys Perry e2dd36c66e nir_lower_mem_access_bit_sizes: support 64-bit offsets 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31904>
 2024-11-13 12:59:26 +00:00
Rhys Perry 0619e4db63 nir,aco,ac/llvm: add nir_op_alignbyte_amd 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31904>
 2024-11-13 12:59:26 +00:00
Rhys Perry db0cbb7e9b aco: optimize nir_op_shfr with <32 src1 
No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31904>
 2024-11-13 12:59:26 +00:00
Rhys Perry bd88c8733a ac/nir: add ACCESS_CAN_REORDER to lowered load_global_constant 
fossil-db (navi21):
Totals from 39 (0.05% of 79395) affected shaders:
Instrs: 2619146 -> 2619273 (+0.00%); split: -0.00%, +0.01%
CodeSize: 14158064 -> 14158304 (+0.00%)
Latency: 17277051 -> 17274098 (-0.02%); split: -0.02%, +0.00%
InvThroughput: 4242241 -> 4241746 (-0.01%); split: -0.01%, +0.00%
SClause: 56514 -> 57561 (+1.85%); split: -0.02%, +1.87%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31904>
 2024-11-13 12:59:26 +00:00
Rhys Perry 0c7830eb85 nir/algebraic: optimize ushr(a, ishl(iand(b, 3), 3)) 
nir_lower_mem_access_bit_sizes creates this.

No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31904>
 2024-11-13 12:59:26 +00:00
Rhys Perry e95a3364b8 nir/algebraic: optimize bcsel(ieq(b, 0), a, shift(a, b)) 
nir_lower_mem_access_bit_sizes can create this.

No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31904>
 2024-11-13 12:59:26 +00:00
Rhys Perry 80b76ba692 nir: add more intrinsics to nir_intrinsic_can_reorder 
Including nir_intrinsic_load_global.

fossil-db (navi21):
Totals from 2725 (3.43% of 79395) affected shaders:
MaxWaves: 71972 -> 71964 (-0.01%); split: +0.01%, -0.02%
Instrs: 2831052 -> 2819902 (-0.39%); split: -0.45%, +0.06%
CodeSize: 15047548 -> 14973072 (-0.49%); split: -0.57%, +0.08%
VGPRs: 108864 -> 108856 (-0.01%); split: -0.02%, +0.01%
SpillSGPRs: 906 -> 926 (+2.21%)
SpillVGPRs: 196 -> 1092 (+457.14%)
Scratch: 729088 -> 741376 (+1.69%)
Latency: 16621317 -> 16586551 (-0.21%); split: -0.34%, +0.13%
InvThroughput: 4169987 -> 4164876 (-0.12%); split: -0.23%, +0.11%
VClause: 63247 -> 63471 (+0.35%); split: -0.21%, +0.56%
SClause: 56978 -> 55276 (-2.99%); split: -3.50%, +0.51%
Copies: 252545 -> 252495 (-0.02%); split: -0.98%, +0.96%
Branches: 91378 -> 91388 (+0.01%); split: -0.03%, +0.04%
PreSGPRs: 112753 -> 126850 (+12.50%); split: -0.48%, +12.98%
PreVGPRs: 90617 -> 90708 (+0.10%)
VALU: 1709034 -> 1709368 (+0.02%); split: -0.01%, +0.03%
SALU: 463554 -> 462253 (-0.28%); split: -0.57%, +0.29%
VMEM: 115952 -> 116272 (+0.28%); split: -0.21%, +0.49%
SMEM: 129097 -> 120538 (-6.63%); split: -6.64%, +0.01%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31904>
 2024-11-13 12:59:26 +00:00
Eric Engestrom c925730779 freedreno/ci: document flakes seen recently 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32080>
 2024-11-13 12:26:50 +00:00
Eric Engestrom 234b9c72f9 nvk/ci: document flakes seen recently 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32080>
 2024-11-13 12:26:50 +00:00