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Author SHA1 Message Date
Yonggang Luo 01ddb18427 compiler: use 4 instead ATOMIC_COUNTER_SIZE in glsl_types.h to avoid #include "mesa/main/config.h" 
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24824>
 2023-08-24 02:54:09 +00:00
Piotr Kocia 27eafbcd4e nir: Remove dead nir_const_value variables 
nir_const_value variables in nir_const_value_for_int and
nor_const_value_for_uint are unused resulting in unnecessary dead code.
The unused-variable warning has been suppressed by the memset following
their declarations.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24851>
 2023-08-23 19:29:19 +00:00
Alyssa Rosenzweig 5189bae50c asahi: Move UBO lowering into GL driver 
In Vulkan, UBOs are lowered by nir_lower_explicit_io, and the ubo_base_agx
sysval is unused (since it doesn't handle descriptor sets). That makes the UBO
lowering GL-only and hence belongs with the GL driver rather than the compiler.
This lets us delete the ubo_base_agx sysval.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
 2023-08-23 15:06:55 +00:00
Alyssa Rosenzweig 1d77fb967d nir,asahi: Remove texture_base_agx 
Doing a descriptor crawl with binding tables requires a real binding table in
the shader, which won't work for VK or merged shader stages in GL. Instead,
let's lower anything that needs a crawl to bindless in the driver, so the
compiler code doesn't need to know anything about descriptor binding models.
That gets rid of the texture_base_agx sysval, which is problematic when there
are multiple descriptor sets worth of textures.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
 2023-08-23 15:06:55 +00:00
Alyssa Rosenzweig ec2ab7d771 nir: Add load_sysval_agx intrinsic 
For merging shader stages, it will be useful to express a load from an explicit
GL "descriptor set", so we can represent things like UBO loads with merged
shaders where UBOs can come from either stage. To do so, we add an intrinsic
representing a load from the driver's uniform tables, indexed like "descriptor
sets" with "bindings".

In principle, a layered GL-on-Vulkan implementation would use literal descriptor
sets for each stage, so I feel comfortable with the analogy here.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
 2023-08-23 15:06:54 +00:00
Daniel Schürmann 7e246f7f2b nir/opt_move: fix handling of if-condition 
By accident, this used the parent of the nir_src which is a nir_if
instead of the parent of the SSA value.

Totals from 10814 (8.10% of 133461) affected shaders: (GFX11)
Instrs: 21759185 -> 21757190 (-0.01%); split: -0.02%, +0.01%
CodeSize: 112320272 -> 112316008 (-0.00%); split: -0.02%, +0.01%
SpillSGPRs: 11220 -> 11212 (-0.07%)
SpillVGPRs: 911 -> 903 (-0.88%); split: -1.54%, +0.66%
Latency: 258334759 -> 258316073 (-0.01%); split: -0.02%, +0.01%
InvThroughput: 31428650 -> 31426394 (-0.01%); split: -0.02%, +0.01%
VClause: 309119 -> 309090 (-0.01%); split: -0.01%, +0.01%
SClause: 657028 -> 657150 (+0.02%); split: -0.03%, +0.04%
Copies: 1434209 -> 1432420 (-0.12%); split: -0.28%, +0.15%
Branches: 481804 -> 481801 (-0.00%)
PreSGPRs: 829995 -> 829966 (-0.00%)
PreVGPRs: 758249 -> 758253 (+0.00%)

Fixes: 8a78706643 ('nir: refactor nir_opt_move')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24695>
 2023-08-22 21:05:18 +00:00
Alyssa Rosenzweig f9e5534182 nir/lower_gs_intrinsics: Remove end primitive for points 
EndPrimitive() for points is entirely pointless, so just remove it when lowering
EndPrimitive to simplify the IR. This is (maybe) an optimization everywhere, and
will be relied on for correctness on Asahi.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24798>
 2023-08-22 20:24:40 +00:00
Alyssa Rosenzweig 8c7629524e nir/print: Print access qualifiers for intrinsics 
Instead of printing an opaque integer that needs to be manually decoded.
Example output:

    32x4   %7 = @image_load (%4 (0x0), %6, %5 (0x0), %4 (0x0)) (image_dim=2D, image_array=false, format=r8g8b8a8_snorm, access=readonly|reorderable, range_base=0, dest_type=float32)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24798>
 2023-08-22 20:24:40 +00:00
Caio Oliveira 48b86a877f compiler/types: Use smaller keys for explicit_matrix_types table 
Instead of using the name as key, use a shorter struct type.
Only build a name string if we are adding a new entry to the table.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23281>
 2023-08-22 18:52:15 +00:00
Caio Oliveira fd1da0f7f5 compiler/types: Extract get_explicit_matrix_instance() function 
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23281>
 2023-08-22 18:52:15 +00:00
Caio Oliveira b248740e30 compiler/types: Use smaller keys for array_types table 
Instead of building a string, build a short struct type and use
that as key.  The only caveat here is ensure there either there's
no internal padding or the internal padding is always the same.
Use a static assert to ensure we are in the former case.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23281>
 2023-08-22 18:52:15 +00:00
Caio Oliveira d4fcc97a3f compiler/types: Use ralloc for the key in array_types 
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23281>
 2023-08-22 18:52:15 +00:00
norablackcat f744c114d1 rusticl: add cl_khr_expect_assume 
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Tested-by: Andrey Alekseenko <al42and@gmail.com>
Tested-by: Yifeng Li <tomli@tomli.me>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23115>
 2023-08-22 17:28:05 +00:00
norablackcat 25bc3d2824 spirv/nir_to_spirv: add expect assume op codes 
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23115>
 2023-08-22 17:28:05 +00:00
Friedrich Vock a28ff7f240 nir/load_store_vectorize: Handle intrinsics with constant base 
This includes nir_load_stack and nir_store_stack, which are vectorized
in nir_lower_shader_calls. If not adjusted, we end up loading from
the wrong base.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9596
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9587
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24789>
 2023-08-22 13:26:12 +00:00
Georg Lehmann 9cf6984200 nir: unify lower_find_msb with has_{find_msb_rev,uclz} 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24662>
 2023-08-22 12:08:37 +00:00
Georg Lehmann 2ac7e6614a nir: unify lower_bitfield_extract with has_bfe 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24662>
 2023-08-22 12:08:37 +00:00
Georg Lehmann 34c3f81614 nir: unify lower_bitfield_insert with has_{bfm,bfi,bitfield_select} 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24662>
 2023-08-22 12:08:37 +00:00
Marek Olšák 1ac379c4a0 nir/algebraic: collapse ALU opcodes sourcing NaN 
Undef will be replaced by NaN whenever it leads to elimination of FP
instructions. This implements the elimination part.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24792>
 2023-08-19 14:18:52 -04:00
Marek Olšák ee225e31c1 nir: fix constant evaluation of fddx/fddy sourcing Inf & NaN constant 
A derivative of NaN is NaN.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24792>
 2023-08-19 14:18:52 -04:00
Timur Kristóf 8780f66c3a nir/opt_dead_cf: Remove if branches with undef condition. 
Treat them as if the undef were false.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24792>
 2023-08-19 14:18:52 -04:00
Alyssa Rosenzweig 558e36f641 nir/passthrough_gs: Fix array size 
Triangle strips with adjacency have 6 vertices input, so we need an array big
enough for all 6 vertices to avoid overflow. Fixes passthrough GS generated for
KHR-GLES31.core.draw_indirect.basic-mode-*-triangle*adj*.

Fixes: ea14579f3d ("nir: handle primitives with adjacency")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24780>
 2023-08-19 17:13:49 +00:00
Alyssa Rosenzweig fe4208ed4c nir/passthrough_gs: Correctly set vertices_in 
If the input primitive has adjacency, the output primitive will have fewer
vertices than the input. For example, if we input TRIANGLE_STRIPS_ADJACENCY, we
need to set vertices_in = 6 even though we'll output TRIANGLE_STRIPS with
vertices_out = 3. Respect that, in order to correctly handle adjacency inputs.

Fixes: ea14579f3d ("nir: handle primitives with adjacency")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24780>
 2023-08-19 17:13:49 +00:00
Alyssa Rosenzweig 04ba4059b7 nir/lower_helper_writes: Consider bindless images 
These need to be handled like other image ops.

Fixes KHR-GLES31.core.shader_image_load_store.basic-allTargets-atomicFS on Asahi
with bindless image access forced.

Fixes: 586da7b329 ("nir: Add nir_lower_helper_writes pass")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24778>
 2023-08-19 12:27:34 -04:00
Alyssa Rosenzweig a257e2daad nir: Lower fquantize2f16 
Passes dEQP-VK.spirv_assembly.*opquantize*.

Unlike the DXIL lowering, this should correctly handle NaNs. (I belive Dozen has
a bug here that is masked by running constant folding early and poor CTS
coverage.) It is also faster than the DXIL lowering for hardware that supports
f2f16 conversions natively. It is not as good as a backend implementation that
could flush-to-zero in hardware... but for a debug instruction it should be more
than good enough.

It might be slightly better to multiply with 0.0 to get the appropriate zero,
but NIR really likes optimizing that out ...

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24616>
 2023-08-18 22:20:02 +00:00
Faith Ekstrand 1198816f50 nir: Use nir_shader_intrinsic_pass() a few places 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24760>
 2023-08-18 17:39:53 +00:00
Faith Ekstrand 831085afa3 nir: Fix metadata in nir_lower_is_helper_invocation 
It does not preserve everything.  It adds and removes instructions and
even adds a variable.

Fixes: f17b41ab4f ("nir: add lowering pass for helperInvocationEXT()")
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24760>
 2023-08-18 17:39:53 +00:00
Alyssa Rosenzweig d620d8d74f nir: Add nir_shader_intrinsics_pass 
Like instructions_pass but specialized to intrinsics. More ergnomic for this
extremely common case, and possibly a bit faster by avoiding the extra function
call on non-intrinsics.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24760>
 2023-08-18 17:39:53 +00:00
Konstantin Seurer 2489f7d84f spirv: Implement SPV_AMDX_shader_enqueue 
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24512>
 2023-08-18 16:57:22 +00:00
Konstantin Seurer 289df72d10 spirv: Update headers and grammer JSON 
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24512>
 2023-08-18 16:57:22 +00:00
Konstantin Seurer ccc52ae887 nir: Add shader enqueue data structures and handling 
There are two new variable modes:
- nir_var_mem_node_payload
- nir_var_mem_node_payload_in

Also add a few more intrinsics and some shader info.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24512>
 2023-08-18 16:57:22 +00:00
Faith Ekstrand 20381eb522 nir: Drop nir_push_if_src() 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24765>
 2023-08-17 23:26:40 -05:00
Faith Ekstrand 96c0f8c580 nir: Drop nir_instr_rewrite_src() 
Replace all its remaining users with nir_src_rewrite().

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24729>
 2023-08-18 01:00:15 +00:00
Faith Ekstrand b5d6b7c402 nir: Drop most uses if nir_instr_rewrite_src() 
Generated by the following semantic patch:

    @@
    expression I, S, D;
    @@

    -nir_instr_rewrite_src(I, S, nir_src_for_ssa(D));
    +nir_src_rewrite(S, D);

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24729>
 2023-08-18 01:00:15 +00:00
Faith Ekstrand 71ddaca2e2 nir: Drop nir_instr_rewrite_src_ssa() 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24729>
 2023-08-18 01:00:15 +00:00
Faith Ekstrand de063a1481 nir: Drop most uses of nir_instr_rewrite_src_ssa() 
Generated with the following semantic patch:

    @@
    expression I, S, D;
    @@

    -nir_instr_rewrite_src_ssa(I, S, D);
    +nir_src_rewrite(S, D);

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24729>
 2023-08-18 01:00:15 +00:00
Faith Ekstrand 964c73e13e nir: Drop nir_if_rewrite_condition() 
Use nir_src_rewrite() instead.  In a couple of cases, we can even drop a
switch on whether or not it's an if source.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24729>
 2023-08-18 01:00:15 +00:00
Faith Ekstrand 267b4fb1b9 nir: Add and use a nir_instr_init_src() helper 
This helper exists for a very tiny set of use-cases but it's better to
have the helper live in nir.c than hand-roll it elsewhere.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24729>
 2023-08-18 01:00:15 +00:00
Faith Ekstrand 9c8cb69c15 nir: Add a nir_instr_clear_src() helper and use it 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24729>
 2023-08-18 01:00:15 +00:00
Faith Ekstrand 7af0dcbdfc nir/opt_undef: Don't rewrite a bcsel to mov 
Technically, it's possible because bcsel has more sources than mov.
However, it's not worth the pain of trying to get it right.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24729>
 2023-08-18 01:00:14 +00:00
Faith Ekstrand 53294de682 nir: Take a nir_def * in nir_phi_instr_add_src() 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24729>
 2023-08-18 01:00:14 +00:00
Faith Ekstrand 298a3eebd8 nir: Take a nir_def * in nir_tex_instr_add_src() 
NIR bits were hand-typed.  Driver updates done through the following
semantic patch:

    @@
    expression T, ST, D;
    @@

    -nir_tex_instr_add_src(T, ST, nir_src_for_ssa(D));
    +nir_tex_instr_add_src(T, ST, D);

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24729>
 2023-08-18 01:00:14 +00:00
Jason Ekstrand f34f740b64 spirv: Re-emit constants at their uses 
Right now, spirv_to_nir places all constants at the top of the function
and has a hash table to de-duplicate them.  This change drops the hash
table and starts re-emitting constants more-or-less at their uses.  This
is more consistent with what we do in GLSL -> NIR translation.  It is,
however, a change to SPIR-V -> NIR translation which will likely affect
other optimizations in unexpected ways so it should be evaluated
separately.

This gives some good saves for spills/fills for Intel, without causing
any significant regressions on RADV, because it is using the
nir_opt_reuse_constants() pass.  In the long run that should be superseded
by some form of GCM.

```
Intel TGL results for Intel fossils:

Totals:
Instrs: 183287977 -> 183269431 (-0.01%); split: -0.07%, +0.06%
Cycles: 18224600804 -> 18223114114 (-0.01%); split: -0.16%, +0.15%
Spill count: 111031 -> 108377 (-2.39%); split: -2.45%, +0.06%
Fill count: 221781 -> 216479 (-2.39%); split: -2.39%, +0.00%
Scratch Memory Size: 4355072 -> 4180992 (-4.00%); split: -5.31%, +1.32%

Totals from 43684 (6.54% of 667704) affected shaders:
Instrs: 38289482 -> 38270936 (-0.05%); split: -0.33%, +0.28%
Cycles: 7166415272 -> 7164928582 (-0.02%); split: -0.40%, +0.38%
Spill count: 93747 -> 91093 (-2.83%); split: -2.90%, +0.07%
Fill count: 190943 -> 185641 (-2.78%); split: -2.78%, +0.00%
Scratch Memory Size: 3127296 -> 2953216 (-5.57%); split: -7.40%, +1.83%
```

```
RADV GFX1100 results for radv fossils:

Totals:
Instrs: 71623708 -> 71624667 (+0.00%); split: -0.00%, +0.01%
CodeSize: 369324312 -> 369334744 (+0.00%); split: -0.00%, +0.01%
SpillSGPRs: 13586 -> 13582 (-0.03%)
SpillVGPRs: 911 -> 910 (-0.11%); split: -0.55%, +0.44%
Latency: 632887831 -> 632880378 (-0.00%); split: -0.00%, +0.00%
InvThroughput: 81674859 -> 81676684 (+0.00%); split: -0.00%, +0.01%
VClause: 1273752 -> 1273727 (-0.00%); split: -0.00%, +0.00%
SClause: 2409593 -> 2409078 (-0.02%); split: -0.02%, +0.00%
Copies: 4063579 -> 4064425 (+0.02%); split: -0.05%, +0.07%
Branches: 1196723 -> 1196720 (-0.00%); split: -0.00%, +0.00%

Totals from 16244 (12.17% of 133461) affected shaders:
Instrs: 31116807 -> 31117766 (+0.00%); split: -0.01%, +0.01%
CodeSize: 160316656 -> 160327088 (+0.01%); split: -0.01%, +0.01%
SpillSGPRs: 12270 -> 12266 (-0.03%)
SpillVGPRs: 835 -> 834 (-0.12%); split: -0.60%, +0.48%
Latency: 344388549 -> 344381096 (-0.00%); split: -0.01%, +0.00%
InvThroughput: 43043761 -> 43045586 (+0.00%); split: -0.01%, +0.01%
VClause: 433221 -> 433196 (-0.01%); split: -0.01%, +0.00%
SClause: 900825 -> 900310 (-0.06%); split: -0.06%, +0.00%
Copies: 1989000 -> 1989846 (+0.04%); split: -0.11%, +0.15%
Branches: 676625 -> 676622 (-0.00%); split: -0.00%, +0.00%
```

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5282>
 2023-08-17 14:58:02 +00:00
Caio Oliveira 74746ac03a nir: Add nir_opt_reuse_constants() 
Currently SPIR-V does pull all the NIR constants it creates into the
first block, but we plan to change that behavior to let those constants
be defined as they are used.

This pass was written to provide a fallback to the old behavior, it will
be used for radv to avoid regressions when performing the SPIR-V change.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5282>
 2023-08-17 14:58:02 +00:00
Konstantin Seurer 3aa3eb8ddd nir/opt_large_constants: Handle small float arrays 
Handles small arrays of integer, positive floats.

RADV fossils:

Totals from 65 (0.05% of 131205) affected shaders:
Instrs: 30001 -> 29936 (-0.22%); split: -0.39%, +0.18%
CodeSize: 165676 -> 164996 (-0.41%); split: -0.53%, +0.12%
Latency: 126873 -> 127178 (+0.24%); split: -0.29%, +0.53%
InvThroughput: 26640 -> 26895 (+0.96%); split: -0.48%, +1.44%
VClause: 425 -> 371 (-12.71%)
SClause: 982 -> 981 (-0.10%); split: -0.92%, +0.81%
Copies: 2072 -> 1939 (-6.42%); split: -6.52%, +0.10%
PreVGPRs: 1553 -> 1537 (-1.03%)

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9000>
 2023-08-16 23:36:29 +00:00
Faith Ekstrand e38522608f nir/opt_large_constants: Add Small constant handling 
Adds handling for constant arrays that can be lowered to
'(imm >> bit_index) & bit_mask' instead of constant loads.

RADV fossils:

Totals from 70 (0.05% of 131205) affected shaders:
Instrs: 31441 -> 31260 (-0.58%); split: -0.59%, +0.02%
CodeSize: 172104 -> 170568 (-0.89%)
VGPRs: 2608 -> 2616 (+0.31%)
Latency: 296687 -> 280859 (-5.33%); split: -5.34%, +0.00%
InvThroughput: 65491 -> 65696 (+0.31%); split: -0.11%, +0.42%
VClause: 671 -> 646 (-3.73%)
SClause: 1014 -> 964 (-4.93%)
Copies: 1742 -> 1564 (-10.22%); split: -10.51%, +0.29%
PreSGPRs: 2039 -> 2036 (-0.15%)
PreVGPRs: 2014 -> 2017 (+0.15%)

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9000>
 2023-08-16 23:36:29 +00:00
Faith Ekstrand 8ec0fdf017 nir/large_constants: Add read/write_const_values helpers 
The write helper is just pulling code we already have out into a helper
and flipping the order of the loop and the switch.  The read helper will
be useful in the next commit where we add small constant support.  This
keeps the two helpers right next to each other in the file where they're
easy to compare and we can ensure that they stay in sync.

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9000>
 2023-08-16 23:36:29 +00:00
Faith Ekstrand 7456ee0523 nir/large_constants: Use nir_component_mask_t 
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9000>
 2023-08-16 23:36:29 +00:00
Faith Ekstrand 4e2830c9ef nir: Clean up nir_op_is_vec() and its callers 
The nir_op_is_vec() helper I added in 842338e2f0 ("nir: Add a
nir_op_is_vec helper") treats nir_op_mov as a vec even though the
semanitcs of the two are different.  In retrospect, this was a mistake
as the previous three fixup commits show.  This commit splits the helper
into two: nir_op_is_vec() and nir_op_is_vec_or_mov() and uses the
appropriate helper at each call site.  Hopefully, this rename will
encurage any future users of these helpers to think about nir_op_mov as
separate from nir_op_vecN and we can avoid these bugs.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24704>
 2023-08-16 21:42:30 +00:00
Faith Ekstrand 408929289a nir: Don't handle nir_op_mov in get_undef_mask in opt_undef 
It's unnecessary because earlier parts of the pass will ensure that a
mov of undef is turned into an undef.  It's also wrong because
nir_op_mov has different semantics from nir_op_vecN when it comes to how
sources map to destination components.

Fixes: 5f26c21e62 ("nir: Expand opt_undef to handle undef channels in a store intrinsic")
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24704>
 2023-08-16 21:42:30 +00:00