From ff660dd637c633bc547f4986ae3a068c3ebcf6d3 Mon Sep 17 00:00:00 2001
From: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Date: Tue, 12 Apr 2022 18:06:03 -0400
Subject: [PATCH] agx: Track write registers more accurately

We may not write a full 32-bit vec4, don't be so pessimistic.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
---
 src/asahi/compiler/agx_register_allocate.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/src/asahi/compiler/agx_register_allocate.c b/src/asahi/compiler/agx_register_allocate.c
index 7c0bbda0edd..00cba9df194 100644
--- a/src/asahi/compiler/agx_register_allocate.c
+++ b/src/asahi/compiler/agx_register_allocate.c
@@ -38,10 +38,15 @@ agx_write_registers(agx_instr *I, unsigned d)
 
    switch (I->op) {
    case AGX_OPCODE_LD_VARY:
+      assert(1 <= I->channels && I->channels <= 4);
+      return I->channels * size;
+
    case AGX_OPCODE_DEVICE_LOAD:
    case AGX_OPCODE_TEXTURE_SAMPLE:
    case AGX_OPCODE_LD_TILE:
-      return 8;
+      /* TODO: mask */
+      return 4 * size;
+
    case AGX_OPCODE_LD_VARY_FLAT:
       return 6;
    case AGX_OPCODE_P_COMBINE: