From fd5c50664e20d23130d5954bcb0bfbbe3bbbf1c0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Timur=20Krist=C3=B3f?= Date: Fri, 29 Aug 2025 13:08:20 +0200 Subject: [PATCH] radv/amdgpu: Emit a single 4 dword NOP in chainable CS buffers This is a small optimization that should slightly reduce the CP overhead for all GPUs as we now only emit a single NOP packet instead of 4. Part-of: --- src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c | 14 +++----------- 1 file changed, 3 insertions(+), 11 deletions(-) diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c index 50516f3e249..e1ba08ddb79 100644 --- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c +++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c @@ -506,15 +506,11 @@ radv_amdgpu_cs_finalize(struct radeon_cmdbuf *_cs) assert(cs->base.cdw <= cs->base.reserved_dw); if (cs->chain_ib) { - const uint32_t nop_packet = get_nop_packet(cs); - /* Pad with NOPs but leave 4 dwords for INDIRECT_BUFFER. */ radv_amdgpu_winsys_cs_pad(_cs, 4); - radeon_emit_unchecked(&cs->base, nop_packet); - radeon_emit_unchecked(&cs->base, nop_packet); - radeon_emit_unchecked(&cs->base, nop_packet); - radeon_emit_unchecked(&cs->base, nop_packet); + /* Emit 4 dwords of NOP, these will be replaced by the chaining INDIRECT_BUFFER. */ + radv_amdgpu_cs_emit_nops(cs, 4); assert(cs->base.cdw <= ~C_3F2_IB_SIZE); *cs->ib_size_ptr |= cs->base.cdw; @@ -588,13 +584,9 @@ radv_amdgpu_cs_unchain(struct radeon_cmdbuf *cs) return; assert(cs->cdw <= cs->max_dw + 4); - const uint32_t nop_packet = get_nop_packet(acs); acs->chained_to = NULL; - cs->buf[cs->cdw - 4] = nop_packet; - cs->buf[cs->cdw - 3] = nop_packet; - cs->buf[cs->cdw - 2] = nop_packet; - cs->buf[cs->cdw - 1] = nop_packet; + cs->buf[cs->cdw - 4] = PKT3(PKT3_NOP, 2, 0); } static bool