From fc5edf9b68159288baa22c055e471de958812312 Mon Sep 17 00:00:00 2001 From: Mike Blumenkrantz Date: Wed, 20 Apr 2022 11:46:36 -0400 Subject: [PATCH] zink: fix xfb counter buffer barriers a read barrier is needed for resume, yes, but the counter buffer is always being written to, so write access must always be set cc: mesa-stable fixes (nv): KHR-GL46.transform_feedback.draw_xfb_test Reviewed-by: Dave Airlie Part-of: --- src/gallium/drivers/zink/ci/zink-nv-fails.txt | 1 - src/gallium/drivers/zink/zink_draw.cpp | 29 ++++++++++--------- 2 files changed, 15 insertions(+), 15 deletions(-) diff --git a/src/gallium/drivers/zink/ci/zink-nv-fails.txt b/src/gallium/drivers/zink/ci/zink-nv-fails.txt index 488fabe4505..d4122676b6f 100644 --- a/src/gallium/drivers/zink/ci/zink-nv-fails.txt +++ b/src/gallium/drivers/zink/ci/zink-nv-fails.txt @@ -16,7 +16,6 @@ KHR-GL46.sparse_texture_tests.SparseTextureCommitment,Fail KHR-GL46.tessellation_shader.tessellation_control_to_tessellation_evaluation.data_pass_through,Fail KHR-GL46.tessellation_shader.tessellation_shader_tc_barriers.barrier_guarded_write_calls,Fail KHR-GL46.texture_view.reference_counting,Fail -KHR-GL46.transform_feedback.draw_xfb_test,Fail KHR-GL46.transform_feedback_overflow_query_ARB.multiple-streams-multiple-buffers-per-stream,Fail KHR-GL46.transform_feedback_overflow_query_ARB.multiple-streams-one-buffer-per-stream,Fail diff --git a/src/gallium/drivers/zink/zink_draw.cpp b/src/gallium/drivers/zink/zink_draw.cpp index 5ffb983ebe7..bd93aa0d293 100644 --- a/src/gallium/drivers/zink/zink_draw.cpp +++ b/src/gallium/drivers/zink/zink_draw.cpp @@ -20,25 +20,26 @@ static void zink_emit_xfb_counter_barrier(struct zink_context *ctx) { - /* Between the pause and resume there needs to be a memory barrier for the counter buffers - * with a source access of VK_ACCESS_TRANSFORM_FEEDBACK_COUNTER_WRITE_BIT_EXT - * at pipeline stage VK_PIPELINE_STAGE_TRANSFORM_FEEDBACK_BIT_EXT - * to a destination access of VK_ACCESS_TRANSFORM_FEEDBACK_COUNTER_READ_BIT_EXT - * at pipeline stage VK_PIPELINE_STAGE_DRAW_INDIRECT_BIT. - * - * - from VK_EXT_transform_feedback spec - */ for (unsigned i = 0; i < ctx->num_so_targets; i++) { struct zink_so_target *t = zink_so_target(ctx->so_targets[i]); if (!t) continue; struct zink_resource *res = zink_resource(t->counter_buffer); - if (t->counter_buffer_valid) - zink_resource_buffer_barrier(ctx, res, VK_ACCESS_TRANSFORM_FEEDBACK_COUNTER_READ_BIT_EXT, - VK_PIPELINE_STAGE_DRAW_INDIRECT_BIT); - else - zink_resource_buffer_barrier(ctx, res, VK_ACCESS_TRANSFORM_FEEDBACK_COUNTER_WRITE_BIT_EXT, - VK_PIPELINE_STAGE_TRANSFORM_FEEDBACK_BIT_EXT); + VkAccessFlags access = VK_ACCESS_TRANSFORM_FEEDBACK_COUNTER_WRITE_BIT_EXT; + VkPipelineStageFlags stage = VK_PIPELINE_STAGE_TRANSFORM_FEEDBACK_BIT_EXT; + if (t->counter_buffer_valid) { + /* Between the pause and resume there needs to be a memory barrier for the counter buffers + * with a source access of VK_ACCESS_TRANSFORM_FEEDBACK_COUNTER_WRITE_BIT_EXT + * at pipeline stage VK_PIPELINE_STAGE_TRANSFORM_FEEDBACK_BIT_EXT + * to a destination access of VK_ACCESS_TRANSFORM_FEEDBACK_COUNTER_READ_BIT_EXT + * at pipeline stage VK_PIPELINE_STAGE_DRAW_INDIRECT_BIT. + * + * - from VK_EXT_transform_feedback spec + */ + access |= VK_ACCESS_TRANSFORM_FEEDBACK_COUNTER_READ_BIT_EXT; + stage |= VK_PIPELINE_STAGE_DRAW_INDIRECT_BIT; + } + zink_resource_buffer_barrier(ctx, res, access, stage); } ctx->xfb_barrier = false; }