From fc2fcac04e2840d2379f0e762a49cbcabf9693f2 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Daniel=20Sch=C3=BCrmann?= <daniel@schuermann.dev>
Date: Wed, 9 Jul 2025 15:41:26 +0200
Subject: [PATCH] aco: allow vectorized nir_op_mov

nir_lower_phis_to_scalar() can create these with the next commit.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35784>
---
 src/amd/compiler/instruction_selection/aco_select_nir_alu.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/amd/compiler/instruction_selection/aco_select_nir_alu.cpp b/src/amd/compiler/instruction_selection/aco_select_nir_alu.cpp
index 59f3451ba95..2faa95d9b38 100644
--- a/src/amd/compiler/instruction_selection/aco_select_nir_alu.cpp
+++ b/src/amd/compiler/instruction_selection/aco_select_nir_alu.cpp
@@ -865,7 +865,7 @@ visit_alu_instr(isel_context* ctx, nir_alu_instr* instr)
       break;
    }
    case nir_op_mov: {
-      Temp src = get_alu_src(ctx, instr->src[0]);
+      Temp src = get_alu_src(ctx, instr->src[0], instr->def.num_components);
       if (src.type() == RegType::vgpr && dst.type() == RegType::sgpr) {
          /* use size() instead of bytes() for 8/16-bit */
          assert(src.size() == dst.size() && "wrong src or dst register class for nir_op_mov");