From fada33343594ab354d3f63dcb996112f1b5abbe3 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Mon, 9 Jun 2025 16:53:37 +1000 Subject: [PATCH] nvk: bindless cbufs on hopper/blackwell are different. These are now 51/13 vs 45/19 in previous. Part-of: --- src/nouveau/vulkan/nvk_cmd_buffer.c | 6 ++++- src/nouveau/vulkan/nvk_cmd_draw.c | 22 +++++++++++----- src/nouveau/vulkan/nvk_descriptor_set.c | 7 +++++- src/nouveau/vulkan/nvk_descriptor_types.h | 25 ++++++++++++++++++- .../vulkan/nvk_nir_lower_descriptors.c | 9 ++++++- 5 files changed, 59 insertions(+), 10 deletions(-) diff --git a/src/nouveau/vulkan/nvk_cmd_buffer.c b/src/nouveau/vulkan/nvk_cmd_buffer.c index a6b6318a288..60079b23214 100644 --- a/src/nouveau/vulkan/nvk_cmd_buffer.c +++ b/src/nouveau/vulkan/nvk_cmd_buffer.c @@ -789,7 +789,11 @@ nvk_bind_descriptor_sets(struct nvk_cmd_buffer *cmd, if (BITSET_TEST(set_layout->dynamic_ubos, j) && nvk_use_bindless_cbuf(&pdev->info)) { assert((offset & 0xf) == 0); - db.cbuf.base_addr_shift_4 += offset >> 4; + if (nvk_use_bindless_cbuf_2(&pdev->info)) { + db.cbuf2.base_addr_shift_6 += offset >> 6; + } else { + db.cbuf.base_addr_shift_4 += offset >> 4; + } } else { db.addr.base_addr += offset; } diff --git a/src/nouveau/vulkan/nvk_cmd_draw.c b/src/nouveau/vulkan/nvk_cmd_draw.c index 3fac450e999..7a8cc6cf56e 100644 --- a/src/nouveau/vulkan/nvk_cmd_draw.c +++ b/src/nouveau/vulkan/nvk_cmd_draw.c @@ -3353,13 +3353,23 @@ nvk_mme_bind_cbuf_desc(struct mme_builder *b) struct mme_value desc_lo = mme_load(b); struct mme_value desc_hi = mme_load(b); - /* The bottom 45 bits are addr >> 4 */ - addr_lo = mme_merge(b, mme_zero(), desc_lo, 4, 28, 0); - addr_hi = mme_merge(b, mme_zero(), desc_lo, 0, 4, 28); - mme_merge_to(b, addr_hi, addr_hi, desc_hi, 4, 13, 0); + if (nvk_use_bindless_cbuf_2(b->devinfo)) { + /* The bottom 51 bits are addr >> 6 */ + addr_lo = mme_merge(b, mme_zero(), desc_lo, 6, 26, 0); + addr_hi = mme_merge(b, mme_zero(), desc_lo, 0, 6, 26); + mme_merge_to(b, addr_hi, addr_hi, desc_hi, 6, 19, 0); - /* The top 19 bits are size >> 4 */ - size = mme_merge(b, mme_zero(), desc_hi, 4, 19, 13); + /* The top 13 bits are size >> 4 */ + size = mme_merge(b, mme_zero(), desc_hi, 4, 13, 19); + } else { + /* The bottom 45 bits are addr >> 4 */ + addr_lo = mme_merge(b, mme_zero(), desc_lo, 4, 28, 0); + addr_hi = mme_merge(b, mme_zero(), desc_lo, 0, 4, 28); + mme_merge_to(b, addr_hi, addr_hi, desc_hi, 4, 13, 0); + + /* The top 19 bits are size >> 4 */ + size = mme_merge(b, mme_zero(), desc_hi, 4, 19, 13); + } mme_free_reg(b, desc_hi); mme_free_reg(b, desc_lo); diff --git a/src/nouveau/vulkan/nvk_descriptor_set.c b/src/nouveau/vulkan/nvk_descriptor_set.c index 6217e331e2d..87229dab4e5 100644 --- a/src/nouveau/vulkan/nvk_descriptor_set.c +++ b/src/nouveau/vulkan/nvk_descriptor_set.c @@ -200,7 +200,12 @@ ubo_desc(const struct nvk_physical_device *pdev, addr_range.addr = ROUND_DOWN_TO(addr_range.addr, min_cbuf_alignment); addr_range.range = align(addr_range.range, min_cbuf_alignment); - if (nvk_use_bindless_cbuf(&pdev->info)) { + if (nvk_use_bindless_cbuf_2(&pdev->info)) { + return (union nvk_buffer_descriptor) { .cbuf2 = { + .base_addr_shift_6 = addr_range.addr >> 6, + .size_shift_4 = addr_range.range >> 4, + }}; + } else if (nvk_use_bindless_cbuf(&pdev->info)) { return (union nvk_buffer_descriptor) { .cbuf = { .base_addr_shift_4 = addr_range.addr >> 4, .size_shift_4 = addr_range.range >> 4, diff --git a/src/nouveau/vulkan/nvk_descriptor_types.h b/src/nouveau/vulkan/nvk_descriptor_types.h index 8890e47a0dd..04670891077 100644 --- a/src/nouveau/vulkan/nvk_descriptor_types.h +++ b/src/nouveau/vulkan/nvk_descriptor_types.h @@ -87,6 +87,17 @@ PRAGMA_DIAGNOSTIC_POP static_assert(sizeof(struct nvk_bindless_cbuf) == 8, "nvk_bindless_cbuf has no holes"); +/* Hopper+ uses a new cbuf format */ +PRAGMA_DIAGNOSTIC_PUSH +PRAGMA_DIAGNOSTIC_ERROR(-Wpadded) +struct nvk_bindless_cbuf_2 { + uint64_t base_addr_shift_6:51; + uint64_t size_shift_4:13; +}; +PRAGMA_DIAGNOSTIC_POP +static_assert(sizeof(struct nvk_bindless_cbuf_2) == 8, + "nvk_bindless_cbuf_2 has no holes"); + /* This has to match nir_address_format_64bit_bounded_global */ PRAGMA_DIAGNOSTIC_PUSH PRAGMA_DIAGNOSTIC_ERROR(-Wpadded) @@ -104,6 +115,7 @@ static_assert(sizeof(struct nvk_buffer_address) == 16, union nvk_buffer_descriptor { struct nvk_buffer_address addr; struct nvk_bindless_cbuf cbuf; + struct nvk_bindless_cbuf_2 cbuf2; }; static inline bool @@ -112,11 +124,22 @@ nvk_use_bindless_cbuf(const struct nv_device_info *info) return info->cls_eng3d >= 0xC597 /* TURING_A */; } +static inline bool +nvk_use_bindless_cbuf_2(const struct nv_device_info *info) +{ + return info->cls_eng3d >= 0xCB97 /* HOPPER_A */; +} + static inline struct nvk_buffer_address nvk_ubo_descriptor_addr(const struct nvk_physical_device *pdev, union nvk_buffer_descriptor desc) { - if (nvk_use_bindless_cbuf(&pdev->info)) { + if (nvk_use_bindless_cbuf_2(&pdev->info)) { + return (struct nvk_buffer_address) { + .base_addr = desc.cbuf2.base_addr_shift_6 << 6, + .size = desc.cbuf2.size_shift_4 << 4, + }; + } else if (nvk_use_bindless_cbuf(&pdev->info)) { return (struct nvk_buffer_address) { .base_addr = desc.cbuf.base_addr_shift_4 << 4, .size = desc.cbuf.size_shift_4 << 4, diff --git a/src/nouveau/vulkan/nvk_nir_lower_descriptors.c b/src/nouveau/vulkan/nvk_nir_lower_descriptors.c index c6074849f8e..3dacea81bb2 100644 --- a/src/nouveau/vulkan/nvk_nir_lower_descriptors.c +++ b/src/nouveau/vulkan/nvk_nir_lower_descriptors.c @@ -56,6 +56,7 @@ struct lower_descriptors_ctx { const struct nvk_descriptor_set_layout *set_layouts[NVK_MAX_SETS]; bool use_bindless_cbuf; + bool use_bindless_cbuf_2; bool use_edb_buffer_views; bool clamp_desc_array_bounds; bool indirect_bind; @@ -647,7 +648,12 @@ load_descriptor(nir_builder *b, unsigned num_components, unsigned bit_size, assert(binding_layout->stride == 1); const uint32_t binding_size = binding_layout->array_size; - if (ctx->use_bindless_cbuf) { + if (ctx->use_bindless_cbuf_2) { + assert(num_components == 1 && bit_size == 64); + const uint32_t size = align(binding_size, 16); + return nir_ior_imm(b, nir_ishr_imm(b, base_addr, 6), + ((uint64_t)size >> 4) << 51); + } else if (ctx->use_bindless_cbuf) { assert(num_components == 1 && bit_size == 64); const uint32_t size = align(binding_size, 16); return nir_ior_imm(b, nir_ishr_imm(b, base_addr, 4), @@ -1585,6 +1591,7 @@ nvk_nir_lower_descriptors(nir_shader *nir, struct lower_descriptors_ctx ctx = { .dev_info = &pdev->info, .use_bindless_cbuf = nvk_use_bindless_cbuf(&pdev->info), + .use_bindless_cbuf_2 = nvk_use_bindless_cbuf_2(&pdev->info), .use_edb_buffer_views = nvk_use_edb_buffer_views(pdev), .clamp_desc_array_bounds = rs->storage_buffers != VK_PIPELINE_ROBUSTNESS_BUFFER_BEHAVIOR_DISABLED_EXT ||