diff --git a/src/freedreno/.gitlab-ci/reference/fd-clouds.log b/src/freedreno/.gitlab-ci/reference/fd-clouds.log
index 6d3bb3cbe0e..ec258b3b8ae 100644
--- a/src/freedreno/.gitlab-ci/reference/fd-clouds.log
+++ b/src/freedreno/.gitlab-ci/reference/fd-clouds.log
@@ -1564,7 +1564,7 @@ cmdstream[0]: 1023 dwords
{ DWORDS = 11 }
0000000001d919e0: 0000: 70c70002 10000000 0000000b
opcode: CP_SET_BIN_DATA5 (2f) (8 dwords)
- { VSC_MASK = 0 | VSC_SIZE = 1 | VSC_N = 0 }
+ { ABS_MASK = NO_ABS_MASK | VSC_SIZE = 1 | VSC_N = 0 | VSC_MASK = 0 }
{ BIN_DATA_ADDR_LO = 0x1d5d000 }
{ BIN_DATA_ADDR_HI = 0 }
{ BIN_SIZE_ADDRESS_LO = 0x1d65800 }
@@ -6881,7 +6881,7 @@ cmdstream[0]: 1023 dwords
{ DWORDS = 11 }
0000000001d91bac: 0000: 70c70002 10000000 0000000b
opcode: CP_SET_BIN_DATA5 (2f) (8 dwords)
- { VSC_MASK = 0 | VSC_SIZE = 1 | VSC_N = 0 }
+ { ABS_MASK = NO_ABS_MASK | VSC_SIZE = 1 | VSC_N = 0 | VSC_MASK = 0 }
{ BIN_DATA_ADDR_LO = 0x1d5d440 }
{ BIN_DATA_ADDR_HI = 0 }
{ BIN_SIZE_ADDRESS_LO = 0x1d65804 }
@@ -7050,7 +7050,7 @@ cmdstream[0]: 1023 dwords
{ DWORDS = 11 }
0000000001d91d78: 0000: 70c70002 10000000 0000000b
opcode: CP_SET_BIN_DATA5 (2f) (8 dwords)
- { VSC_MASK = 0 | VSC_SIZE = 1 | VSC_N = 0 }
+ { ABS_MASK = NO_ABS_MASK | VSC_SIZE = 1 | VSC_N = 0 | VSC_MASK = 0 }
{ BIN_DATA_ADDR_LO = 0x1d5d880 }
{ BIN_DATA_ADDR_HI = 0 }
{ BIN_SIZE_ADDRESS_LO = 0x1d65808 }
@@ -7219,7 +7219,7 @@ cmdstream[0]: 1023 dwords
{ DWORDS = 11 }
0000000001d91f44: 0000: 70c70002 10000000 0000000b
opcode: CP_SET_BIN_DATA5 (2f) (8 dwords)
- { VSC_MASK = 0 | VSC_SIZE = 1 | VSC_N = 0 }
+ { ABS_MASK = NO_ABS_MASK | VSC_SIZE = 1 | VSC_N = 0 | VSC_MASK = 0 }
{ BIN_DATA_ADDR_LO = 0x1d5dcc0 }
{ BIN_DATA_ADDR_HI = 0 }
{ BIN_SIZE_ADDRESS_LO = 0x1d6580c }
diff --git a/src/freedreno/registers/adreno/adreno_pm4.xml b/src/freedreno/registers/adreno/adreno_pm4.xml
index 4482099efc5..63a333cd306 100644
--- a/src/freedreno/registers/adreno/adreno_pm4.xml
+++ b/src/freedreno/registers/adreno/adreno_pm4.xml
@@ -1132,6 +1132,11 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords)
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@@ -1147,33 +1152,73 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords)
+
+
+ If this field is 1, VSC_MASK and VSC_N are
+ ignored and instead a new ordinal immediately
+ after specifies the full 32-bit mask of bins
+ to use. The mask is "absolute" instead of
+ relative to VSC_N.
+
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@@ -1189,19 +1234,37 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords)
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