From f9fcd7168a1e0826a4e36a30c0c46d78c88c92aa Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jos=C3=A9=20Roberto=20de=20Souza?= Date: Tue, 13 Jun 2023 10:56:26 -0700 Subject: [PATCH] intel/dev/xe: Add support for small-bar setups MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This adds support for discrete GPUs placed in systems with large PCI bar or resizeble PCI bar not available or disabled. Signed-off-by: José Roberto de Souza Reviewed-by: Lionel Landwerlin Part-of: --- src/intel/dev/xe/intel_device_info.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/src/intel/dev/xe/intel_device_info.c b/src/intel/dev/xe/intel_device_info.c index 0cf36f36813..e44e6d97aa5 100644 --- a/src/intel/dev/xe/intel_device_info.c +++ b/src/intel/dev/xe/intel_device_info.c @@ -106,13 +106,16 @@ intel_device_info_xe_query_regions(int fd, struct intel_device_info *devinfo, if (!update) { devinfo->mem.vram.mem.klass = region->mem_class; devinfo->mem.vram.mem.instance = region->instance; - devinfo->mem.vram.mappable.size = region->total_size; + devinfo->mem.vram.mappable.size = region->cpu_visible_size; + devinfo->mem.vram.unmappable.size = region->total_size - region->cpu_visible_size; } else { assert(devinfo->mem.vram.mem.klass == region->mem_class); assert(devinfo->mem.vram.mem.instance == region->instance); - assert(devinfo->mem.vram.mappable.size == region->total_size); + assert(devinfo->mem.vram.mappable.size == region->cpu_visible_size); + assert(devinfo->mem.vram.unmappable.size == (region->total_size - region->cpu_visible_size)); } - devinfo->mem.vram.mappable.free = region->total_size - region->used; + devinfo->mem.vram.mappable.free = devinfo->mem.vram.mappable.size - region->cpu_visible_used; + devinfo->mem.vram.unmappable.free = devinfo->mem.vram.unmappable.size - (region->used - region->cpu_visible_used); break; } default: