From f7d6c6e1ed9919d37ceb05cbe5ed75b377253a3a Mon Sep 17 00:00:00 2001 From: Lionel Landwerlin Date: Tue, 22 Nov 2022 10:47:58 +0200 Subject: [PATCH] anv: fixup context initialization on DG2 Fixing a typo :( Signed-off-by: Lionel Landwerlin Fixes: 507a86e131d6 ("anv: ensure CPS is initialized when KHR_fragment_shading_rate is disabled") Reviewed-by: Kenneth Graunke Part-of: --- src/intel/vulkan/genX_state.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/intel/vulkan/genX_state.c b/src/intel/vulkan/genX_state.c index 92ba28b0f32..f379791782d 100644 --- a/src/intel/vulkan/genX_state.c +++ b/src/intel/vulkan/genX_state.c @@ -181,7 +181,7 @@ init_common_queue_state(struct anv_queue *queue, struct anv_batch *batch) /* Emit STATE_BASE_ADDRESS on Gfx12+ because we set a default CPS_STATE and * those are relative to STATE_BASE_ADDRESS::DynamicStateBaseAddress. */ -#if GFX_VERx >= 12 +#if GFX_VER >= 12 /* GEN:BUG:1607854226: * * Non-pipelined state has issues with not applying in MEDIA/GPGPU mode. @@ -233,7 +233,9 @@ init_common_queue_state(struct anv_queue *queue, struct anv_batch *batch) sba.BindlessSamplerStateBaseAddressModifyEnable = true; sba.BindlessSamplerStateBufferSize = 0; +#if GFX_VERx10 >= 125 sba.L1CacheControl = L1CC_WB; +#endif } #endif