diff --git a/src/compiler/nir/nir.c b/src/compiler/nir/nir.c index 28dd50f9d64..5aa180a883e 100644 --- a/src/compiler/nir/nir.c +++ b/src/compiler/nir/nir.c @@ -2453,6 +2453,8 @@ nir_intrinsic_from_system_value(gl_system_value val) return nir_intrinsic_load_color1; case SYSTEM_VALUE_VIEW_INDEX: return nir_intrinsic_load_view_index; + case SYSTEM_VALUE_AMPLIFICATION_ID_KK: + return nir_intrinsic_load_amplification_id_kk; case SYSTEM_VALUE_SUBGROUP_SIZE: return nir_intrinsic_load_subgroup_size; case SYSTEM_VALUE_SUBGROUP_INVOCATION: @@ -2635,6 +2637,8 @@ nir_system_value_from_intrinsic(nir_intrinsic_op intrin) return SYSTEM_VALUE_COLOR1; case nir_intrinsic_load_view_index: return SYSTEM_VALUE_VIEW_INDEX; + case nir_intrinsic_load_amplification_id_kk: + return SYSTEM_VALUE_AMPLIFICATION_ID_KK; case nir_intrinsic_load_subgroup_size: return SYSTEM_VALUE_SUBGROUP_SIZE; case nir_intrinsic_load_subgroup_invocation: @@ -3515,6 +3519,7 @@ nir_tex_instr_src_type(const nir_tex_instr *instr, unsigned src) case nir_tex_src_comparator: case nir_tex_src_bias: case nir_tex_src_min_lod: + case nir_tex_src_max_lod_kk: case nir_tex_src_ddx: case nir_tex_src_ddy: case nir_tex_src_backend1: diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h index 73432c7a651..84f239eff89 100644 --- a/src/compiler/nir/nir.h +++ b/src/compiler/nir/nir.h @@ -2227,6 +2227,13 @@ typedef enum nir_tex_src_type { */ nir_tex_src_min_lod, + /** Max LOD + * + * The computed LOD is clamped to be at most as large as max_lod before + * mip-mapping. + */ + nir_tex_src_max_lod_kk, + /** LOD bias + min LOD packed together into 32-bits. This is the common case * for texturing on Honeykrisp with DX12, where both LOD bias and min LOD are * emulated and passed in a single hardware source together. So it's diff --git a/src/compiler/nir/nir_divergence_analysis.c b/src/compiler/nir/nir_divergence_analysis.c index 5be3183df46..295ed1c1d8a 100644 --- a/src/compiler/nir/nir_divergence_analysis.c +++ b/src/compiler/nir/nir_divergence_analysis.c @@ -471,6 +471,7 @@ visit_intrinsic(nir_intrinsic_instr *instr, struct divergence_state *state) is_divergent = !(options & nir_divergence_single_prim_per_subgroup); break; case nir_intrinsic_load_view_index: + case nir_intrinsic_load_amplification_id_kk: assert(stage != MESA_SHADER_COMPUTE && stage != MESA_SHADER_KERNEL); if (options & nir_divergence_view_index_uniform) is_divergent = false; @@ -742,7 +743,11 @@ visit_intrinsic(nir_intrinsic_instr *instr, struct divergence_state *state) case nir_intrinsic_load_frag_offset_ir3: case nir_intrinsic_bindless_resource_ir3: case nir_intrinsic_ray_intersection_ir3: - case nir_intrinsic_read_attribute_payload_intel: { + case nir_intrinsic_read_attribute_payload_intel: + case nir_intrinsic_load_buffer_ptr_kk: + case nir_intrinsic_load_texture_handle_kk: + case nir_intrinsic_load_depth_texture_kk: + case nir_intrinsic_load_sampler_handle_kk: { unsigned num_srcs = nir_intrinsic_infos[instr->intrinsic].num_srcs; for (unsigned i = 0; i < num_srcs; i++) { if (src_divergent(instr->src[i], state)) { diff --git a/src/compiler/nir/nir_gather_info.c b/src/compiler/nir/nir_gather_info.c index b0aa2293732..799a1235590 100644 --- a/src/compiler/nir/nir_gather_info.c +++ b/src/compiler/nir/nir_gather_info.c @@ -734,6 +734,7 @@ gather_intrinsic_info(nir_intrinsic_instr *instr, nir_shader *shader) case nir_intrinsic_load_work_dim: case nir_intrinsic_load_user_data_amd: case nir_intrinsic_load_view_index: + case nir_intrinsic_load_amplification_id_kk: case nir_intrinsic_load_barycentric_model: case nir_intrinsic_load_ray_launch_id: case nir_intrinsic_load_ray_launch_size: diff --git a/src/compiler/nir/nir_intrinsics.py b/src/compiler/nir/nir_intrinsics.py index 668bb2007ea..29e57eae15d 100644 --- a/src/compiler/nir/nir_intrinsics.py +++ b/src/compiler/nir/nir_intrinsics.py @@ -980,6 +980,7 @@ system_value("layer_id", 1) system_value("view_index", 1) system_value("subgroup_size", 1) system_value("subgroup_invocation", 1) +system_value("amplification_id_kk", 1) # These intrinsics provide a bitmask for all invocations, with one bit per # invocation starting with the least significant bit, according to the @@ -2799,3 +2800,17 @@ intrinsic("load_packed_sample_location_pco", src_comp=[1], dest_comp=1, flags=[C # src[] = { buffer_index/deref }. intrinsic("is_null_descriptor", src_comp=[-1], dest_comp=1, flags=[CAN_ELIMINATE, CAN_REORDER], bit_sizes=[1]) + +# KosmicKrisp-specific intrinsics + +# Represents a pointer to the start of an argument buffer at the +# given binding +load("buffer_ptr_kk", [], [BINDING], [CAN_ELIMINATE, CAN_REORDER]) +# Opaque texture handle, with DEST_TYPE representing T +load("texture_handle_kk", [1], [DEST_TYPE, IMAGE_DIM, IMAGE_ARRAY, FLAGS], [CAN_ELIMINATE]) +# Same as above but for depth textures, T is always float +load("depth_texture_kk", [1], [IMAGE_DIM, IMAGE_ARRAY], [CAN_ELIMINATE]) +# Load a bindless sampler handle mapping a binding table sampler. +intrinsic("load_sampler_handle_kk", [1], 1, [], + flags=[CAN_ELIMINATE, CAN_REORDER], + bit_sizes=[16]) diff --git a/src/compiler/nir/nir_print.c b/src/compiler/nir/nir_print.c index 6dfa47fdcd0..4a0ff2c0c32 100644 --- a/src/compiler/nir/nir_print.c +++ b/src/compiler/nir/nir_print.c @@ -1919,6 +1919,9 @@ print_tex_instr(nir_tex_instr *instr, print_state *state) case nir_tex_src_min_lod: fprintf(fp, "(min_lod)"); break; + case nir_tex_src_max_lod_kk: + fprintf(fp, "(max_lod_kk)"); + break; case nir_tex_src_ms_index: fprintf(fp, "(ms_index)"); break; diff --git a/src/compiler/shader_enums.h b/src/compiler/shader_enums.h index 88f16ceaa81..73141a4c407 100644 --- a/src/compiler/shader_enums.h +++ b/src/compiler/shader_enums.h @@ -855,6 +855,11 @@ typedef enum /** Required for VK_KHX_multiview */ SYSTEM_VALUE_VIEW_INDEX, + /** Metal's amplification_id. Required to emulate view index on the vertex + * shaders. This value is present in both vertex and fragment shaders + */ + SYSTEM_VALUE_AMPLIFICATION_ID_KK, + /** * Driver internal vertex-count, used (for example) for drivers to * calculate stride for stream-out outputs. Not externally visible.