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radv: pass addr to radv_copy_buffer()

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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33475>
This commit is contained in:
Samuel Pitoiset
2025-02-10 11:07:22 +01:00
committed by Marge Bot
parent 228903aeaf
commit f70af40c5d
4 changed files with 25 additions and 20 deletions
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src/amd/vulkan/meta/radv_meta_buffer.c
+10 -9
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@@ -275,14 +275,11 @@ radv_fill_buffer(struct radv_cmd_buffer *cmd_buffer, const struct radv_image *im
void
radv_copy_buffer(struct radv_cmd_buffer *cmd_buffer, struct radeon_winsys_bo *src_bo, struct radeon_winsys_bo *dst_bo,
uint64_t src_offset, uint64_t dst_offset, uint64_t size)
uint64_t src_va, uint64_t dst_va, uint64_t size)
{
struct radv_device *device = radv_cmd_buffer_device(cmd_buffer);
bool use_compute =
!(size & 3) && !(src_offset & 3) && !(dst_offset & 3) && radv_prefer_compute_dma(device, size, src_bo, dst_bo);
uint64_t src_va = radv_buffer_get_va(src_bo) + src_offset;
uint64_t dst_va = radv_buffer_get_va(dst_bo) + dst_offset;
!(size & 3) && !(src_va & 3) && !(dst_va & 3) && radv_prefer_compute_dma(device, size, src_bo, dst_bo);
radv_cs_add_buffer(device->ws, cmd_buffer->cs, src_bo);
radv_cs_add_buffer(device->ws, cmd_buffer->cs, dst_bo);
@@ -320,8 +317,10 @@ copy_buffer(struct radv_cmd_buffer *cmd_buffer, struct radv_buffer *src_buffer,
old_predicating = cmd_buffer->state.predicating;
cmd_buffer->state.predicating = false;
radv_copy_buffer(cmd_buffer, src_buffer->bo, dst_buffer->bo, src_buffer->offset + region->srcOffset,
dst_buffer->offset + region->dstOffset, region->size);
const uint64_t src_va = radv_buffer_get_va(src_buffer->bo) + src_buffer->offset + region->srcOffset;
const uint64_t dst_va = radv_buffer_get_va(dst_buffer->bo) + dst_buffer->offset + region->dstOffset;
radv_copy_buffer(cmd_buffer, src_buffer->bo, dst_buffer->bo, src_va, dst_va, region->size);
/* Restore conditional rendering. */
cmd_buffer->state.predicating = old_predicating;
@@ -384,7 +383,9 @@ radv_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDevice
} else {
uint32_t buf_offset;
radv_cmd_buffer_upload_data(cmd_buffer, dataSize, pData, &buf_offset);
radv_copy_buffer(cmd_buffer, cmd_buffer->upload.upload_bo, dst_buffer->bo, buf_offset,
dstOffset + dst_buffer->offset, dataSize);
const uint64_t src_va = radv_buffer_get_va(cmd_buffer->upload.upload_bo) + buf_offset;
radv_copy_buffer(cmd_buffer, cmd_buffer->upload.upload_bo, dst_buffer->bo, src_va, va, dataSize);
}
}
src/amd/vulkan/meta/radv_meta_bufimage.c
+5 -5
View File
@@ -1001,14 +1001,14 @@ fixup_gfx9_cs_copy(struct radv_cmd_buffer *cmd_buffer, const struct radv_meta_bl
coordY, img_bsurf->layer, image->vk.image_type == VK_IMAGE_TYPE_3D);
struct radeon_winsys_bo *img_bo = image->bindings[0].bo;
struct radeon_winsys_bo *mem_bo = buf_bsurf->buffer->bo;
const uint64_t img_offset = image->bindings[0].offset + addr;
const uint64_t img_va = radv_buffer_get_va(img_bo) + image->bindings[0].offset + addr;
/* buf_bsurf->offset already includes the layer offset */
const uint64_t mem_offset =
buf_bsurf->buffer->offset + buf_bsurf->offset + y * buf_bsurf->pitch * surf->bpe + x * surf->bpe;
const uint64_t mem_va = radv_buffer_get_va(mem_bo) + buf_bsurf->buffer->offset + buf_bsurf->offset +
y * buf_bsurf->pitch * surf->bpe + x * surf->bpe;
if (to_image) {
radv_copy_buffer(cmd_buffer, mem_bo, img_bo, mem_offset, img_offset, surf->bpe);
radv_copy_buffer(cmd_buffer, mem_bo, img_bo, mem_va, img_va, surf->bpe);
} else {
radv_copy_buffer(cmd_buffer, img_bo, mem_bo, img_offset, mem_offset, surf->bpe);
radv_copy_buffer(cmd_buffer, img_bo, mem_bo, img_va, mem_va, surf->bpe);
}
}
}
src/amd/vulkan/meta/radv_meta_fmask_copy.c
+6 -4
View File
@@ -167,7 +167,7 @@ static void
radv_fixup_copy_dst_metadata(struct radv_cmd_buffer *cmd_buffer, const struct radv_image *src_image,
const struct radv_image *dst_image)
{
uint64_t src_offset, dst_offset, size;
uint64_t src_va, dst_va, size;
assert(src_image->planes[0].surface.cmask_size == dst_image->planes[0].surface.cmask_size &&
src_image->planes[0].surface.fmask_size == dst_image->planes[0].surface.fmask_size);
@@ -178,10 +178,12 @@ radv_fixup_copy_dst_metadata(struct radv_cmd_buffer *cmd_buffer, const struct ra
/* Copy CMASK+FMASK. */
size = src_image->planes[0].surface.cmask_size + src_image->planes[0].surface.fmask_size;
src_offset = src_image->bindings[0].offset + src_image->planes[0].surface.fmask_offset;
dst_offset = dst_image->bindings[0].offset + dst_image->planes[0].surface.fmask_offset;
src_va = radv_buffer_get_va(src_image->bindings[0].bo) + src_image->bindings[0].offset +
src_image->planes[0].surface.fmask_offset;
dst_va = radv_buffer_get_va(dst_image->bindings[0].bo) + dst_image->bindings[0].offset +
dst_image->planes[0].surface.fmask_offset;
radv_copy_buffer(cmd_buffer, src_image->bindings[0].bo, dst_image->bindings[0].bo, src_offset, dst_offset, size);
radv_copy_buffer(cmd_buffer, src_image->bindings[0].bo, dst_image->bindings[0].bo, src_va, dst_va, size);
}
bool
src/amd/vulkan/radv_acceleration_structure.c
+4 -2
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@@ -588,8 +588,10 @@ radv_update_as(VkCommandBuffer commandBuffer, const VkAccelerationStructureBuild
radv_get_acceleration_structure_layout(device, leaf_count, build_info, &layout);
/* Copy header/metadata */
radv_copy_buffer(cmd_buffer, src_as_buffer->bo, dst_as_buffer->bo, src_as_buffer->offset + src->offset,
dst_as_buffer->offset + dst->offset, layout.bvh_offset);
const uint64_t src_va = radv_buffer_get_va(src_as_buffer->bo) + src_as_buffer->offset + src->offset;
const uint64_t dst_va = radv_buffer_get_va(dst_as_buffer->bo) + dst_as_buffer->offset + dst->offset;
radv_copy_buffer(cmd_buffer, src_as_buffer->bo, dst_as_buffer->bo, src_va, dst_va, layout.bvh_offset);
}
struct scratch_layout layout;