From f5e5705c91562dd8e36c82de928944d1e202e995 Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Tue, 7 Mar 2023 20:51:19 -0800 Subject: [PATCH] intel/fs: Use F32TO16/F16TO32 helpers in fquantize16 handling I originally thought that we were intentionally emitting the legacy opcodes here to make them opaque to the optimizer, so that it wouldn't eliminate the explicit type conversions, as they're actually required to do the quantization. But...we don't actually optimize those away currently anyway. So...go ahead and use the helpers for consistency. Reviewed-by: Lionel Landwerlin Reviewed-by: Sagar Ghuge Part-of: --- src/intel/compiler/brw_fs_nir.cpp | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index 35290d59b48..d9bfc06f1f5 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -1603,9 +1603,7 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr, fs_reg zero = bld.vgrf(BRW_REGISTER_TYPE_F); /* The destination stride must be at least as big as the source stride. */ - tmp16.type = devinfo->ver > 7 - ? BRW_REGISTER_TYPE_HF : BRW_REGISTER_TYPE_W; - tmp16.stride = 2; + tmp16 = subscript(tmp16, BRW_REGISTER_TYPE_HF, 0); /* Check for denormal */ fs_reg abs_src0 = op[0]; @@ -1617,8 +1615,8 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr, retype(op[0], BRW_REGISTER_TYPE_UD), brw_imm_ud(0x80000000)); /* Do the actual F32 -> F16 -> F32 conversion */ - bld.emit(BRW_OPCODE_F32TO16, tmp16, op[0]); - bld.emit(BRW_OPCODE_F16TO32, tmp32, tmp16); + bld.F32TO16(tmp16, op[0]); + bld.F16TO32(tmp32, tmp16); /* Select that or zero based on normal status */ inst = bld.SEL(result, zero, tmp32); inst->predicate = BRW_PREDICATE_NORMAL;