diff --git a/src/amd/common/ac_shader_util.c b/src/amd/common/ac_shader_util.c
index 3fbc1942575..7adf3b0b0bb 100644
--- a/src/amd/common/ac_shader_util.c
+++ b/src/amd/common/ac_shader_util.c
@@ -93,6 +93,7 @@ void ac_set_nir_options(struct radeon_info *info, bool use_llvm,
    options->lower_fisnormal = true;
    options->support_16bit_alu = info->gfx_level >= GFX8;
    options->vectorize_vec2_16bit = info->has_packed_math_16bit;
+   options->discard_is_demote = true;
 }
 
 bool
diff --git a/src/broadcom/vulkan/v3dv_pipeline.c b/src/broadcom/vulkan/v3dv_pipeline.c
index 75b7e54c80e..3699a4322d8 100644
--- a/src/broadcom/vulkan/v3dv_pipeline.c
+++ b/src/broadcom/vulkan/v3dv_pipeline.c
@@ -224,6 +224,7 @@ const nir_shader_compiler_options v3dv_nir_options = {
    .force_indirect_unrolling = (nir_var_shader_in | nir_var_function_temp),
    .divergence_analysis_options =
       nir_divergence_multiple_workgroup_per_compute_subgroup,
+   .discard_is_demote = true,
 };
 
 const nir_shader_compiler_options *
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index c8f8a18c661..fe80ff67e3f 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -4181,6 +4181,12 @@ typedef struct nir_shader_compiler_options {
    /** clip/cull distance and tess level arrays use compact semantics */
    bool compact_arrays;
 
+   /**
+    * Whether discard gets emitted as nir_intrinsic_demote.
+    * Otherwise, nir_intrinsic_terminate is being used.
+    */
+   bool discard_is_demote;
+
    /** Options determining lowering and behavior of inputs and outputs. */
    nir_io_options io_options;
 
diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c
index ea38861eb13..9c66641c7a7 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -6850,7 +6850,8 @@ spirv_to_nir(const uint32_t *words, size_t word_count,
     * Related glslang issue: https://github.com/KhronosGroup/glslang/issues/2416
     */
    bool dxsc = b->generator_id == vtn_generator_spiregg;
-   b->convert_discard_to_demote = ((dxsc && !b->enabled_capabilities.DemoteToHelperInvocation) ||
+   b->convert_discard_to_demote = (nir_options->discard_is_demote ||
+                                   (dxsc && !b->enabled_capabilities.DemoteToHelperInvocation) ||
                                    (is_glslang(b) && b->source_lang == SpvSourceLanguageHLSL)) &&
                                   b->supported_capabilities.DemoteToHelperInvocation;
 
diff --git a/src/gallium/drivers/zink/zink_compiler.c b/src/gallium/drivers/zink/zink_compiler.c
index 8cfd741cb36..0ae07c75257 100644
--- a/src/gallium/drivers/zink/zink_compiler.c
+++ b/src/gallium/drivers/zink/zink_compiler.c
@@ -1434,6 +1434,9 @@ zink_screen_init_compiler(struct zink_screen *screen)
        screen->info.driver_props.driverID == VK_DRIVER_ID_AMD_OPEN_SOURCE ||
        screen->info.driver_props.driverID == VK_DRIVER_ID_AMD_PROPRIETARY)
       screen->nir_options.lower_doubles_options = nir_lower_dmod;
+
+   if (screen->info.have_EXT_shader_demote_to_helper_invocation)
+      screen->nir_options.discard_is_demote = true;
 }
 
 const void *
diff --git a/src/intel/compiler/brw_compiler.c b/src/intel/compiler/brw_compiler.c
index 5ebab79d9fd..fb2397897a7 100644
--- a/src/intel/compiler/brw_compiler.c
+++ b/src/intel/compiler/brw_compiler.c
@@ -32,6 +32,7 @@
 const struct nir_shader_compiler_options brw_scalar_nir_options = {
    .avoid_ternary_with_two_constants = true,
    .compact_arrays = true,
+   .discard_is_demote = true,
    .divergence_analysis_options =
       (nir_divergence_single_patch_per_tcs_subgroup |
        nir_divergence_single_patch_per_tes_subgroup |
diff --git a/src/intel/compiler/elk/elk_nir_options.c b/src/intel/compiler/elk/elk_nir_options.c
index e6bd354426e..925861a6985 100644
--- a/src/intel/compiler/elk/elk_nir_options.c
+++ b/src/intel/compiler/elk/elk_nir_options.c
@@ -7,6 +7,7 @@
 
 #define COMMON_OPTIONS                                                        \
    .compact_arrays = true,                                                    \
+   .discard_is_demote = true,                                                 \
    .has_uclz = true,                                                          \
    .lower_fdiv = true,                                                        \
    .lower_scmp = true,                                                        \
diff --git a/src/microsoft/ci/spirv2dxil_reference.txt b/src/microsoft/ci/spirv2dxil_reference.txt
index 7cf02011031..c58846bed7d 100644
--- a/src/microsoft/ci/spirv2dxil_reference.txt
+++ b/src/microsoft/ci/spirv2dxil_reference.txt
@@ -603,7 +603,14 @@ Test:SpvParserCFGTest_EmitBody_IfBreak_FromThen_ForwardWithinThen.spvasm:main|Fr
 Test:SpvParserCFGTest_EmitBody_IfBreak_FromThenWithForward_FromElseWithForward_AlsoPremerge.spvasm:main|Fragment: Pass
 Test:SpvParserCFGTest_EmitBody_IfSelection_TrueBranch_LoopBreak.spvasm:main|Fragment: Pass
 Test:SpvParserCFGTest_EmitBody_Kill_InsideIf.spvasm:main|Fragment: Pass
-Test:SpvParserCFGTest_EmitBody_Kill_InsideLoop.spvasm:main|Fragment: Pass
+Test:SpvParserCFGTest_EmitBody_Kill_InsideLoop.spvasm:main|Fragment: Fail
+DXIL: Function: main: error: Loop must have break.
+Validation failed.
+Failed to validate DXIL
+
+
+
+
 Test:SpvParserCFGTest_EmitBody_Kill_TopLevel.spvasm:main|Fragment: Pass
 Test:SpvParserCFGTest_EmitBody_Loop_BodyAlwaysBreaks.spvasm:main|Fragment: Pass
 Test:SpvParserCFGTest_EmitBody_Loop_BodyConditionallyBreaks_FromFalse.spvasm:main|Fragment: Pass
diff --git a/src/microsoft/ci/warp-fails.txt b/src/microsoft/ci/warp-fails.txt
index e69de29bb2d..e80bec0289e 100644
--- a/src/microsoft/ci/warp-fails.txt
+++ b/src/microsoft/ci/warp-fails.txt
@@ -0,0 +1,3 @@
+# The CTS expects OpKill to terminate shaders while the spec allows it to be implemented
+# as OpDemoteToHelperInvocation. Wait for pending CTS fix.
+dEQP-VK.graphicsfuzz.while-inside-switch,Fail
diff --git a/src/microsoft/compiler/nir_to_dxil.c b/src/microsoft/compiler/nir_to_dxil.c
index 6bffeee8f1e..21f63365ed9 100644
--- a/src/microsoft/compiler/nir_to_dxil.c
+++ b/src/microsoft/compiler/nir_to_dxil.c
@@ -160,6 +160,7 @@ nir_options = {
    .linker_ignore_precision = true,
    .support_16bit_alu = true,
    .preserve_mediump = true,
+   .discard_is_demote = true,
 };
 
 const nir_shader_compiler_options*
diff --git a/src/nouveau/codegen/nv50_ir_from_nir.cpp b/src/nouveau/codegen/nv50_ir_from_nir.cpp
index 0e5ebc64a11..381d99e4888 100644
--- a/src/nouveau/codegen/nv50_ir_from_nir.cpp
+++ b/src/nouveau/codegen/nv50_ir_from_nir.cpp
@@ -3506,6 +3506,7 @@ nvir_nir_shader_compiler_options(int chipset, uint8_t shader_type)
       ((chipset >= NVISA_GV100_CHIPSET) ? nir_lower_dsub : 0) |
       ((chipset >= NVISA_GV100_CHIPSET) ? nir_lower_ddiv : 0)
    );
+   op.discard_is_demote = true;
    return op;
 }
 
diff --git a/src/nouveau/compiler/nak/api.rs b/src/nouveau/compiler/nak/api.rs
index 5e8aab8dba5..40b853554a6 100644
--- a/src/nouveau/compiler/nak/api.rs
+++ b/src/nouveau/compiler/nak/api.rs
@@ -155,6 +155,7 @@ fn nir_options(dev: &nv_device_info) -> nir_shader_compiler_options {
     op.has_find_msb_rev = true;
     op.has_pack_half_2x16_rtz = true;
     op.has_bfm = dev.sm >= 70;
+    op.discard_is_demote = true;
 
     op.max_unroll_iterations = 32;