ac: update amdgpu_drm.h for uq metadata query info

struct drm_amdgpu_info_uq_fw_areas is renamed to drm_amdgpu_info_uq_metadata.
query infor structure for compute and sdma is added.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38647>
This commit is contained in:
Yogesh Mohan Marimuthu
2025-11-25 11:06:26 +05:30
committed by Marge Bot
parent b13003133d
commit f322bc8631
4 changed files with 67 additions and 28 deletions
+33 -21
View File
@@ -1491,27 +1491,6 @@ struct drm_amdgpu_info_hw_ip {
__u32 ip_discovery_version;
};
/* GFX metadata BO sizes and alignment info (in bytes) */
struct drm_amdgpu_info_uq_fw_areas_gfx {
/* shadow area size */
__u32 shadow_size;
/* shadow area base virtual mem alignment */
__u32 shadow_alignment;
/* context save area size */
__u32 csa_size;
/* context save area base virtual mem alignment */
__u32 csa_alignment;
};
/* IP specific metadata related information used in the
* subquery AMDGPU_INFO_UQ_FW_AREAS
*/
struct drm_amdgpu_info_uq_fw_areas {
union {
struct drm_amdgpu_info_uq_fw_areas_gfx gfx;
};
};
struct drm_amdgpu_info_num_handles {
/** Max handles as supported by firmware for UVD */
__u32 uvd_max_handles;
@@ -1575,6 +1554,39 @@ struct drm_amdgpu_info_gpuvm_fault {
__u32 vmhub;
};
struct drm_amdgpu_info_uq_metadata_gfx {
/* shadow area size for gfx11 */
__u32 shadow_size;
/* shadow area base virtual alignment for gfx11 */
__u32 shadow_alignment;
/* context save area size for gfx11 */
__u32 csa_size;
/* context save area base virtual alignment for gfx11 */
__u32 csa_alignment;
};
struct drm_amdgpu_info_uq_metadata_compute {
/* EOP size for gfx11 */
__u32 eop_size;
/* EOP base virtual alignment for gfx11 */
__u32 eop_alignment;
};
struct drm_amdgpu_info_uq_metadata_sdma {
/* context save area size for sdma6 */
__u32 csa_size;
/* context save area base virtual alignment for sdma6 */
__u32 csa_alignment;
};
struct drm_amdgpu_info_uq_metadata {
union {
struct drm_amdgpu_info_uq_metadata_gfx gfx;
struct drm_amdgpu_info_uq_metadata_compute compute;
struct drm_amdgpu_info_uq_metadata_sdma sdma;
};
};
/*
* Supported GPU families
*/