From f2d2014636e776245bcee68a35da8894ea274c09 Mon Sep 17 00:00:00 2001 From: Ian Romanick Date: Tue, 9 Jul 2024 20:54:35 -0700 Subject: [PATCH] brw/nir: Simplify get_nir_image_intrinsic_image and get_nir_buffer_intrinsic_index shader-db: All Intel platforms had similar results. (Meteor Lake shown) total instructions in shared programs: 20041625 -> 20041634 (<.01%) instructions in affected programs: 1206 -> 1215 (0.75%) helped: 0 / HURT: 5 total cycles in shared programs: 929993812 -> 929993816 (<.01%) cycles in affected programs: 10930 -> 10934 (0.04%) helped: 1 / HURT: 2 fossil-db: Lunar Lake Totals: Instrs: 142892951 -> 142893049 (+0.00%) Send messages: 6591165 -> 6591186 (+0.00%) Cycle count: 21653727624 -> 21653732470 (+0.00%); split: -0.00%, +0.00% Scratch Memory Size: 5664768 -> 5660672 (-0.07%) Max live registers: 47944999 -> 47944983 (-0.00%) Totals from 19 (0.00% of 553292) affected shaders: Instrs: 10671 -> 10769 (+0.92%) Send messages: 697 -> 718 (+3.01%) Cycle count: 234508 -> 239354 (+2.07%); split: -0.01%, +2.08% Scratch Memory Size: 38912 -> 34816 (-10.53%) Max live registers: 2203 -> 2187 (-0.73%) Meteor Lake and DG2 had similar results. (Meteor Lake shown) Totals: Instrs: 156744203 -> 156743428 (-0.00%); split: -0.00%, +0.00% Send messages: 7654787 -> 7654808 (+0.00%) Cycle count: 16942341318 -> 16942329195 (-0.00%); split: -0.00%, +0.00% Spill count: 75549 -> 75499 (-0.07%) Fill count: 140094 -> 140012 (-0.06%) Scratch Memory Size: 3945472 -> 3944448 (-0.03%) Max live registers: 32642020 -> 32642009 (-0.00%) Totals from 19 (0.00% of 644000) affected shaders: Instrs: 12489 -> 11714 (-6.21%); split: -7.00%, +0.79% Send messages: 697 -> 718 (+3.01%) Cycle count: 203873 -> 191750 (-5.95%); split: -6.77%, +0.82% Spill count: 50 -> 0 (-inf%) Fill count: 82 -> 0 (-inf%) Scratch Memory Size: 25600 -> 24576 (-4.00%) Max live registers: 1150 -> 1139 (-0.96%) No fossil-db changes on Tiger Lake, Ice Lake, or Skylake. Reviewed-by: Kenneth Graunke Part-of: --- src/intel/compiler/brw_fs_nir.cpp | 58 +++++++------------------------ 1 file changed, 12 insertions(+), 46 deletions(-) diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index cc91b441659..bffc1c59b01 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -1886,28 +1886,6 @@ get_nir_src_bindless(nir_to_brw_state &ntb, const nir_src &src) return ntb.ssa_bind_infos[src.ssa->index].bindless; } -static bool -is_resource_src(nir_src src) -{ - return src.ssa->parent_instr->type == nir_instr_type_intrinsic && - nir_instr_as_intrinsic(src.ssa->parent_instr)->intrinsic == nir_intrinsic_resource_intel; -} - -static brw_reg -get_resource_nir_src(nir_to_brw_state &ntb, const nir_src &src) -{ - if (!is_resource_src(src)) - return brw_reg(); - - assert(ntb.ssa_values[src.ssa->index].is_scalar); - - brw_reg reg = ntb.ssa_values[src.ssa->index]; - - reg.type = brw_type_with_size(BRW_TYPE_D, nir_src_bit_size(src)); - - return component(reg, 0); -} - /** * Specifying -1 for channel indicates that no channel selection should be applied. */ @@ -4815,16 +4793,11 @@ static brw_reg get_nir_image_intrinsic_image(nir_to_brw_state &ntb, const brw::fs_builder &bld, nir_intrinsic_instr *instr) { - if (is_resource_src(instr->src[0])) { - brw_reg surf_index = get_resource_nir_src(ntb, instr->src[0]); - if (surf_index.file != BAD_FILE) - return surf_index; - } + brw_reg surf_index = get_nir_src_imm(ntb, instr->src[0]); + enum brw_reg_type type = brw_type_with_size(BRW_TYPE_UD, + brw_type_size_bits(surf_index.type)); - brw_reg image = retype(get_nir_src_imm(ntb, instr->src[0]), BRW_TYPE_UD); - brw_reg surf_index = image; - - return bld.emit_uniformize(surf_index); + return bld.emit_uniformize(retype(surf_index, type)); } static brw_reg @@ -4837,22 +4810,15 @@ get_nir_buffer_intrinsic_index(nir_to_brw_state &ntb, const brw::fs_builder &bld instr->intrinsic == nir_intrinsic_store_ssbo_block_intel; nir_src src = is_store ? instr->src[1] : instr->src[0]; - if (no_mask_handle) - *no_mask_handle = false; + brw_reg surf_index = get_nir_src_imm(ntb, src); - if (nir_src_is_const(src)) { - if (no_mask_handle) - *no_mask_handle = true; - return brw_imm_ud(nir_src_as_uint(src)); - } else if (is_resource_src(src)) { - brw_reg surf_index = get_resource_nir_src(ntb, src); - if (surf_index.file != BAD_FILE) { - if (no_mask_handle) - *no_mask_handle = true; - return surf_index; - } - } - return bld.emit_uniformize(get_nir_src(ntb, src)); + if (no_mask_handle) + *no_mask_handle = surf_index.is_scalar || surf_index.file == IMM; + + enum brw_reg_type type = brw_type_with_size(BRW_TYPE_UD, + brw_type_size_bits(surf_index.type)); + + return bld.emit_uniformize(retype(surf_index, type)); } /**