From f24c799c67222a925036a6ce32606fe40a023da9 Mon Sep 17 00:00:00 2001 From: David Rosca Date: Wed, 23 Oct 2024 17:34:45 +0200 Subject: [PATCH] radeonsi/vcn: Only enable skip mode with matching references Skip mode frames must match the reference frames otherwise skip mode needs to be disabled. Fixes: 1e1f078099e ("radeonsi/vcn: Add support for VCN5 AV1 compound") Reviewed-by: Ruijing Dong Part-of: --- src/gallium/drivers/radeonsi/radeon_vcn_enc.c | 28 +++++++++++-------- src/gallium/drivers/radeonsi/radeon_vcn_enc.h | 2 +- .../drivers/radeonsi/radeon_vcn_enc_5_0.c | 17 ++++++++--- 3 files changed, 31 insertions(+), 16 deletions(-) diff --git a/src/gallium/drivers/radeonsi/radeon_vcn_enc.c b/src/gallium/drivers/radeonsi/radeon_vcn_enc.c index 748873f401d..349f6fb8a87 100644 --- a/src/gallium/drivers/radeonsi/radeon_vcn_enc.c +++ b/src/gallium/drivers/radeonsi/radeon_vcn_enc.c @@ -714,8 +714,6 @@ static void radeon_vcn_enc_hevc_get_param(struct radeon_encoder *enc, static void radeon_vcn_enc_av1_get_spec_misc_param(struct radeon_encoder *enc, struct pipe_av1_enc_picture_desc *pic) { - struct si_screen *sscreen = (struct si_screen *)enc->screen; - enc->enc_pic.av1_spec_misc.cdef_mode = pic->seq.seq_bits.enable_cdef; enc->enc_pic.av1_spec_misc.disable_cdf_update = pic->disable_cdf_update; enc->enc_pic.av1_spec_misc.disable_frame_end_update_cdf = pic->disable_frame_end_update_cdf; @@ -749,15 +747,6 @@ static void radeon_vcn_enc_av1_get_spec_misc_param(struct radeon_encoder *enc, enc->enc_pic.av1_spec_misc.mv_precision = RENCODE_AV1_MV_PRECISION_FORCE_INTEGER_MV; else enc->enc_pic.av1_spec_misc.mv_precision = RENCODE_AV1_MV_PRECISION_ALLOW_HIGH_PRECISION; - - if (sscreen->info.vcn_ip_version >= VCN_5_0_0) { - enc->enc_pic.av1.skip_mode_allowed = radeon_enc_av1_skip_mode_allowed(enc); - if (enc->enc_pic.av1.compound) { - enc->need_spec_misc = - !enc->enc_pic.av1.skip_mode_allowed != enc->enc_pic.av1_spec_misc.disallow_skip_mode; - enc->enc_pic.av1_spec_misc.disallow_skip_mode = !enc->enc_pic.av1.skip_mode_allowed; - } - } } static void radeon_vcn_enc_av1_get_rc_param(struct radeon_encoder *enc, @@ -902,6 +891,23 @@ static void radeon_vcn_enc_av1_get_param(struct radeon_encoder *enc, enc_pic->av1.compound = true; /* UNIDIR_COMP */ enc_pic->av1_enc_params.lsm_reference_frame_index[1] = pic->ref_list0[1]; } + + uint32_t skip_frames[2]; + enc_pic->av1.skip_mode_allowed = radeon_enc_av1_skip_mode_allowed(enc, skip_frames); + + if (enc_pic->av1.compound) { + bool disallow_skip_mode = enc_pic->av1_spec_misc.disallow_skip_mode; + enc_pic->av1_spec_misc.disallow_skip_mode = !enc_pic->av1.skip_mode_allowed; + /* Skip mode frames must match reference frames */ + if (enc_pic->av1.skip_mode_allowed) { + enc_pic->av1_spec_misc.disallow_skip_mode = + skip_frames[0] != enc_pic->av1_enc_params.lsm_reference_frame_index[0] || + skip_frames[1] != enc_pic->av1_enc_params.lsm_reference_frame_index[1]; + } + enc->need_spec_misc = disallow_skip_mode != enc_pic->av1_spec_misc.disallow_skip_mode; + } else { + enc->need_spec_misc = false; + } } if (enc->dpb_type == DPB_TIER_2) { diff --git a/src/gallium/drivers/radeonsi/radeon_vcn_enc.h b/src/gallium/drivers/radeonsi/radeon_vcn_enc.h index c0f4c6d4a6d..d0e9a94dd27 100644 --- a/src/gallium/drivers/radeonsi/radeon_vcn_enc.h +++ b/src/gallium/drivers/radeonsi/radeon_vcn_enc.h @@ -398,7 +398,7 @@ bool radeon_enc_is_av1_uniform_tile (uint32_t nb_sb, uint32_t nb_tiles, void radeon_enc_av1_tile_layout (uint32_t nb_sb, uint32_t nb_tiles, uint32_t min_nb_sb, struct tile_1d_layout *p); -bool radeon_enc_av1_skip_mode_allowed(struct radeon_encoder *enc); +bool radeon_enc_av1_skip_mode_allowed(struct radeon_encoder *enc, uint32_t frames[2]); void radeon_enc_create_dpb_aux_buffers(struct radeon_encoder *enc, struct radeon_enc_dpb_buffer *buf); diff --git a/src/gallium/drivers/radeonsi/radeon_vcn_enc_5_0.c b/src/gallium/drivers/radeonsi/radeon_vcn_enc_5_0.c index bd622e2d426..dae165d9bc9 100644 --- a/src/gallium/drivers/radeonsi/radeon_vcn_enc_5_0.c +++ b/src/gallium/drivers/radeonsi/radeon_vcn_enc_5_0.c @@ -831,7 +831,7 @@ static int32_t radeon_enc_av1_get_relative_dist(struct radeon_encoder *enc, uint return diff; } -bool radeon_enc_av1_skip_mode_allowed(struct radeon_encoder *enc) +bool radeon_enc_av1_skip_mode_allowed(struct radeon_encoder *enc, uint32_t frames[2]) { if (enc->enc_pic.frame_type == PIPE_AV1_ENC_FRAME_TYPE_KEY || enc->enc_pic.frame_type == PIPE_AV1_ENC_FRAME_TYPE_INTRA_ONLY || @@ -860,8 +860,12 @@ bool radeon_enc_av1_skip_mode_allowed(struct radeon_encoder *enc) if (forward_idx < 0) return false; - else if (backward_idx >= 0) + + if (backward_idx >= 0) { + frames[0] = MIN2(forward_idx, backward_idx); + frames[1] = MAX2(forward_idx, backward_idx); return true; + } int32_t second_forward_idx = -1; uint32_t second_forward_hint; @@ -876,7 +880,12 @@ bool radeon_enc_av1_skip_mode_allowed(struct radeon_encoder *enc) } } - return second_forward_idx >= 0; + if (second_forward_idx < 0) + return false; + + frames[0] = MIN2(forward_idx, second_forward_idx); + frames[1] = MAX2(forward_idx, second_forward_idx); + return true; } static void radeon_enc_av1_frame_header(struct radeon_encoder *enc, bool frame_header) @@ -912,7 +921,7 @@ static void radeon_enc_av1_frame_header(struct radeon_encoder *enc, bool frame_h if (enc->enc_pic.av1.skip_mode_allowed) /* skip_mode_present */ - radeon_enc_code_fixed_bits(enc, 1, 1); + radeon_enc_code_fixed_bits(enc, !enc->enc_pic.av1_spec_misc.disallow_skip_mode, 1); /* reduced_tx_set */ radeon_enc_code_fixed_bits(enc, 0, 1);