From f0aad5bd7e6653756ad7c66b3f8811bb99d25858 Mon Sep 17 00:00:00 2001 From: Sagar Ghuge Date: Tue, 18 Nov 2025 14:05:49 -0800 Subject: [PATCH] anv: Convert indirect to direct dispatch Saves unncessary PC and stall during encode phase. Thanks to Felix for pointing out that CCS always needs a CS stall once we add a pipe control, that will kill the performance for BVH construction. Signed-off-by: Sagar Ghuge Reviewed-by: Lionel Landwerlin Part-of: --- src/intel/vulkan/genX_acceleration_structure.c | 16 ++-------------- 1 file changed, 2 insertions(+), 14 deletions(-) diff --git a/src/intel/vulkan/genX_acceleration_structure.c b/src/intel/vulkan/genX_acceleration_structure.c index e6f97e22571..145b6cad323 100644 --- a/src/intel/vulkan/genX_acceleration_structure.c +++ b/src/intel/vulkan/genX_acceleration_structure.c @@ -378,20 +378,8 @@ anv_encode_as(VkCommandBuffer commandBuffer, const struct vk_acceleration_struct }; anv_bvh_build_set_args(commandBuffer, &args, sizeof(args)); - /* L1/L2 caches flushes should have been dealt with by pipeline barriers. - * Unfortunately some platforms require L3 flush because CS (reading the - * ir_internal_node_count paramters from vk_ir_header) is not L3 coherent. - */ - if (!ANV_DEVINFO_HAS_COHERENT_L3_CS(cmd_buffer->device->info)) { - anv_add_pending_pipe_bits(cmd_buffer, ANV_PIPE_DATA_CACHE_FLUSH_BIT, - "ir internal node count for dispatch"); - } - - struct anv_address indirect_addr = - anv_address_from_u64(intermediate_header_addr + - offsetof(struct vk_ir_header, ir_internal_node_count)); - anv_genX(cmd_buffer->device->info, cmd_buffer_dispatch_indirect) - (cmd_buffer, indirect_addr, true /* is_unaligned_size_x */); + anv_genX(cmd_buffer->device->info, cmd_dispatch_unaligned) + (commandBuffer, MAX2(state->leaf_node_count, 1), 1, 1); } static VkResult