From f06a1b0d07885e477dd4bb0f3e45f95a76c7ad41 Mon Sep 17 00:00:00 2001 From: Qiang Yu Date: Tue, 11 Mar 2025 10:10:38 +0800 Subject: [PATCH] radeonsi: enlarge SI_NUM_SHADERS for mesh shader MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reviewed-by: Marek Olšák Part-of: --- src/gallium/drivers/radeonsi/si_descriptors.c | 7 ++++--- src/gallium/drivers/radeonsi/si_pipe.c | 9 +++++---- src/gallium/drivers/radeonsi/si_state.h | 2 +- 3 files changed, 10 insertions(+), 8 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c index 7b4f31a4490..c322ba82a8d 100644 --- a/src/gallium/drivers/radeonsi/si_descriptors.c +++ b/src/gallium/drivers/radeonsi/si_descriptors.c @@ -2844,8 +2844,6 @@ static void si_emit_gfx_resources_add_all_to_bo_list(struct si_context *sctx, un void si_init_all_descriptors(struct si_context *sctx) { - int i; - unsigned first_shader = sctx->is_gfx_queue ? 0 : MESA_SHADER_COMPUTE; unsigned hs_sgpr0, gs_sgpr0; if (sctx->gfx_level >= GFX12) { @@ -2859,7 +2857,10 @@ void si_init_all_descriptors(struct si_context *sctx) gs_sgpr0 = R_00B208_SPI_SHADER_USER_DATA_ADDR_LO_GS; } - for (i = first_shader; i < SI_NUM_SHADERS; i++) { + for (unsigned i = 0; i < SI_NUM_SHADERS; i++) { + if (!sctx->is_gfx_queue && i != MESA_SHADER_COMPUTE) + continue; + bool is_2nd = sctx->gfx_level >= GFX9 && (i == MESA_SHADER_TESS_CTRL || i == MESA_SHADER_GEOMETRY); unsigned num_sampler_slots = SI_NUM_IMAGE_SLOTS / 2 + SI_NUM_SAMPLERS; diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index 3e07b4e2d4c..c4c28460f7d 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -519,7 +519,6 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen, unsign struct si_context *sctx = CALLOC_STRUCT(si_context); struct radeon_winsys *ws = sscreen->ws; - int shader, i; if (!sctx) { mesa_loge("can't allocate a context"); @@ -770,9 +769,11 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen, unsign } sctx->null_const_buf.buffer_size = sctx->null_const_buf.buffer->width0; - unsigned start_shader = sctx->is_gfx_queue ? 0 : MESA_SHADER_COMPUTE; - for (shader = start_shader; shader < SI_NUM_SHADERS; shader++) { - for (i = 0; i < SI_NUM_CONST_BUFFERS; i++) { + for (unsigned shader = 0; shader < SI_NUM_SHADERS; shader++) { + if (!sctx->is_gfx_queue && shader != MESA_SHADER_COMPUTE) + continue; + + for (unsigned i = 0; i < SI_NUM_CONST_BUFFERS; i++) { sctx->b.set_constant_buffer(&sctx->b, shader, i, &sctx->null_const_buf); } } diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h index ed7b0423a21..5e0f55c52e3 100644 --- a/src/gallium/drivers/radeonsi/si_state.h +++ b/src/gallium/drivers/radeonsi/si_state.h @@ -16,7 +16,7 @@ extern "C" { #endif #define SI_NUM_GRAPHICS_SHADERS (MESA_SHADER_FRAGMENT + 1) -#define SI_NUM_SHADERS (MESA_SHADER_COMPUTE + 1) +#define SI_NUM_SHADERS (MESA_SHADER_MESH + 1) #define SI_NUM_VERTEX_BUFFERS SI_MAX_ATTRIBS #define SI_NUM_SAMPLERS 32 /* OpenGL textures units per shader */