From eff0998064f2ec422fd7465d130fd17286a30b93 Mon Sep 17 00:00:00 2001 From: Georg Lehmann Date: Wed, 13 Sep 2023 14:14:05 +0200 Subject: [PATCH] radv: use radv_nir_opt_tid_function to create inverse_ballot MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Foz-DB Navi21: Totals from 542 (0.68% of 79395) affected shaders: Instrs: 617316 -> 616259 (-0.17%); split: -0.19%, +0.02% CodeSize: 3347852 -> 3320040 (-0.83%); split: -0.85%, +0.02% VGPRs: 21864 -> 21824 (-0.18%); split: -0.29%, +0.11% SpillSGPRs: 207 -> 199 (-3.86%) Latency: 4900847 -> 4895665 (-0.11%); split: -0.11%, +0.01% InvThroughput: 860278 -> 857272 (-0.35%); split: -0.35%, +0.00% SClause: 21251 -> 21169 (-0.39%); split: -0.40%, +0.01% Copies: 57759 -> 58881 (+1.94%); split: -0.06%, +2.00% Branches: 20854 -> 20365 (-2.34%); split: -2.36%, +0.01% PreSGPRs: 20785 -> 20774 (-0.05%) PreVGPRs: 17309 -> 17212 (-0.56%) VALU: 379885 -> 378180 (-0.45%); split: -0.45%, +0.00% SALU: 87522 -> 88664 (+1.30%); split: -0.02%, +1.32% Reviewed-by: Daniel Schürmann Part-of: --- src/amd/vulkan/radv_pipeline.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index e67327f2961..59381f1689c 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -37,6 +37,9 @@ #include "vk_format.h" #include "vk_nir_convert_ycbcr.h" #include "vk_ycbcr_conversion.h" +#if AMD_LLVM_AVAILABLE +#include "ac_llvm_util.h" +#endif bool radv_shader_need_indirect_descriptor_sets(const struct radv_shader *shader) @@ -386,11 +389,17 @@ radv_postprocess_nir(struct radv_device *device, const struct radv_graphics_stat /* LLVM could support more of these in theory. */ bool use_llvm = radv_use_llvm_for_stage(pdev, stage->stage); + bool has_inverse_ballot = true; +#if AMD_LLVM_AVAILABLE + has_inverse_ballot = !use_llvm || LLVM_VERSION_MAJOR >= 17; +#endif radv_nir_opt_tid_function_options tid_options = { .use_masked_swizzle_amd = true, .use_dpp16_shift_amd = !use_llvm && gfx_level >= GFX8, .use_clustered_rotate = !use_llvm, .hw_subgroup_size = stage->info.wave_size, + .hw_ballot_bit_size = has_inverse_ballot ? stage->info.wave_size : 0, + .hw_ballot_num_comp = has_inverse_ballot ? 1 : 0, }; NIR_PASS(_, stage->nir, radv_nir_opt_tid_function, &tid_options);