From ee395df3152bffb37f6a358a8b12f5aa613fcf20 Mon Sep 17 00:00:00 2001 From: Jason Ekstrand Date: Mon, 15 Mar 2021 18:39:19 -0500 Subject: [PATCH] genxml: Make 1-bit L3$ config register fields bool on Gen7 Otherwise, they look like booleans but, if you put a value other than 0/1 in them, the GenXML generator code will explode. Fixes: b6875b0094c "anv: Drop has_slm in emit_l3_config for gen11+" Reviewed-by: Jordan Justen Part-of: --- src/intel/genxml/gen7.xml | 14 +++++++------- src/intel/genxml/gen75.xml | 14 +++++++------- 2 files changed, 14 insertions(+), 14 deletions(-) diff --git a/src/intel/genxml/gen7.xml b/src/intel/genxml/gen7.xml index 255fd5e7eb1..bb59c87a880 100644 --- a/src/intel/genxml/gen7.xml +++ b/src/intel/genxml/gen7.xml @@ -3768,23 +3768,23 @@ - + - + - + - + - + - + - + diff --git a/src/intel/genxml/gen75.xml b/src/intel/genxml/gen75.xml index cf7ca7d70de..0d57d7bc795 100644 --- a/src/intel/genxml/gen75.xml +++ b/src/intel/genxml/gen75.xml @@ -4181,22 +4181,22 @@ - + - + - + - + - + - + - +