diff --git a/src/freedreno/ci/deqp-freedreno-a630-flakes.txt b/src/freedreno/ci/deqp-freedreno-a630-flakes.txt index eaf812dee07..17f572dc969 100644 --- a/src/freedreno/ci/deqp-freedreno-a630-flakes.txt +++ b/src/freedreno/ci/deqp-freedreno-a630-flakes.txt @@ -91,11 +91,6 @@ dEQP-GLES31.functional.layout_binding.ssbo.fragment_binding_array dEQP-GLES3.functional.fbo.blit.conversion.rg8i_to_r16i dEQP-GLES3.functional.fbo.blit.conversion.rg8_to_r16f -# Started appearing after disabling cpufreq, devfreq and disabling runtime PM -dEQP-GLES3.functional.fbo.blit.depth_stencil.depth32f_stencil8_basic -dEQP-GLES3.functional.fbo.blit.depth_stencil.depth32f_stencil8_scale -dEQP-GLES3.functional.fbo.blit.depth_stencil.depth32f_stencil8_stencil_only - # Could trip hangcheck timeout dEQP-VK.api.command_buffers.record_many_draws_primary_2 dEQP-VK.api.command_buffers.record_many_draws_secondary_2 diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c index d227e320b47..86b810ca567 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c @@ -524,6 +524,7 @@ fd6_clear_ubwc(struct fd_batch *batch, struct fd_resource *rsc) assert_dt fd6_event_write(batch, ring, PC_CCU_FLUSH_COLOR_TS, true); fd6_event_write(batch, ring, PC_CCU_FLUSH_DEPTH_TS, true); fd6_event_write(batch, ring, CACHE_FLUSH_TS, true); + fd_wfi(batch, ring); fd6_cache_inv(batch, ring); } @@ -893,6 +894,7 @@ fd6_resolve_tile(struct fd_batch *batch, struct fd_ringbuffer *ring, * results in sysmem, so we need to flush manually here. */ fd6_event_write(batch, ring, PC_CCU_FLUSH_COLOR_TS, true); + fd_wfi(batch, ring); } static bool @@ -956,6 +958,7 @@ handle_rgba_blit(struct fd_context *ctx, fd6_event_write(batch, batch->draw, PC_CCU_FLUSH_COLOR_TS, true); fd6_event_write(batch, batch->draw, PC_CCU_FLUSH_DEPTH_TS, true); fd6_event_write(batch, batch->draw, CACHE_FLUSH_TS, true); + fd_wfi(batch, batch->draw); fd6_cache_inv(batch, batch->draw); fd_batch_unlock_submit(batch); diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_draw.c b/src/gallium/drivers/freedreno/a6xx/fd6_draw.c index 1bc4478e9cf..c6493b4dc0f 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_draw.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_draw.c @@ -373,7 +373,7 @@ fd6_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info, } static void -fd6_clear_lrz(struct fd_batch *batch, struct fd_resource *zsbuf, double depth) +fd6_clear_lrz(struct fd_batch *batch, struct fd_resource *zsbuf, double depth) assert_dt { struct fd_ringbuffer *ring; struct fd_screen *screen = batch->ctx->screen; @@ -432,6 +432,7 @@ fd6_clear_lrz(struct fd_batch *batch, struct fd_resource *zsbuf, double depth) fd6_event_write(batch, ring, PC_CCU_FLUSH_COLOR_TS, true); fd6_event_write(batch, ring, PC_CCU_INVALIDATE_COLOR, false); + fd_wfi(batch, ring); OUT_PKT4(ring, REG_A6XX_RB_2D_SRC_SOLID_C0, 4); OUT_RING(ring, fui(depth)); @@ -477,6 +478,7 @@ fd6_clear_lrz(struct fd_batch *batch, struct fd_resource *zsbuf, double depth) fd6_event_write(batch, ring, PC_CCU_FLUSH_COLOR_TS, true); fd6_event_write(batch, ring, PC_CCU_FLUSH_DEPTH_TS, true); fd6_event_write(batch, ring, CACHE_FLUSH_TS, true); + fd_wfi(batch, ring); fd6_cache_inv(batch, ring); } diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c index 950d7e9968f..c9cd60e2ef8 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c @@ -1413,6 +1413,7 @@ fd6_framebuffer_barrier(struct fd_context *ctx) assert_dt fd6_event_write(batch, ring, PC_CCU_FLUSH_DEPTH_TS, true); seqno = fd6_event_write(batch, ring, CACHE_FLUSH_TS, true); + fd_wfi(batch, ring); fd6_event_write(batch, ring, 0x31, false); diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c index 4c641b99bd7..3f04a409bc6 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c @@ -1512,6 +1512,7 @@ emit_sysmem_clears(struct fd_batch *batch, struct fd_ringbuffer *ring) assert_dt } fd6_event_write(batch, ring, PC_CCU_FLUSH_COLOR_TS, true); + fd_wfi(batch, ring); trace_end_clear_restore(&batch->trace); } @@ -1609,7 +1610,7 @@ fd6_emit_sysmem_prep(struct fd_batch *batch) assert_dt } static void -fd6_emit_sysmem_fini(struct fd_batch *batch) +fd6_emit_sysmem_fini(struct fd_batch *batch) assert_dt { struct fd_ringbuffer *ring = batch->gmem; @@ -1625,6 +1626,7 @@ fd6_emit_sysmem_fini(struct fd_batch *batch) fd6_event_write(batch, ring, PC_CCU_FLUSH_COLOR_TS, true); fd6_event_write(batch, ring, PC_CCU_FLUSH_DEPTH_TS, true); + fd_wfi(batch, ring); } void