From edcad250ed72a36902328bcbd7fe757c4339ca85 Mon Sep 17 00:00:00 2001 From: Sagar Ghuge Date: Sun, 2 Jun 2024 19:12:14 -0700 Subject: [PATCH] intel/compiler: Don't use half float param for sample_b Looks like some of the tests uses the bias which does not fit into half float parameter, so it's better to use float param for sample_b. If we have cube arrays, we anyway combine BIAS and array index properly so we don't have to worry about the first parameter. This fixes: GTF-GL46.gtf21.GL3Tests.texture_lod_bias.texture_lod_bias_clamp_m_g_M Signed-off-by: Sagar Ghuge Reviewed-by: Ian Romanick Part-of: --- src/intel/compiler/brw_fs_lower_simd_width.cpp | 3 +-- src/intel/compiler/brw_fs_nir.cpp | 4 ---- src/intel/compiler/brw_ir_fs.h | 5 ----- src/intel/compiler/brw_lower_logical_sends.cpp | 7 ++----- 4 files changed, 3 insertions(+), 16 deletions(-) diff --git a/src/intel/compiler/brw_fs_lower_simd_width.cpp b/src/intel/compiler/brw_fs_lower_simd_width.cpp index 83f77424344..63fb26a7a44 100644 --- a/src/intel/compiler/brw_fs_lower_simd_width.cpp +++ b/src/intel/compiler/brw_fs_lower_simd_width.cpp @@ -198,8 +198,7 @@ get_sampler_lowered_simd_width(const struct intel_device_info *devinfo, inst->components_read(TEX_LOGICAL_SRC_MIN_LOD); - if (inst->opcode == FS_OPCODE_TXB_LOGICAL && - devinfo->ver >= 20 && inst->has_packed_lod_ai_src) { + if (inst->opcode == FS_OPCODE_TXB_LOGICAL && devinfo->ver >= 20) { num_payload_components += 3 - coord_components; } else if (inst->opcode == SHADER_OPCODE_TXD_LOGICAL && devinfo->verx10 >= 125 && devinfo->ver < 20) { diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index fe22121b3d0..63a81946812 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -8253,7 +8253,6 @@ fs_nir_emit_texture(nir_to_brw_state &ntb, ASSERTED bool got_lod = false; ASSERTED bool got_bias = false; - bool pack_lod_and_array_index = false; bool pack_lod_bias_and_offset = false; uint32_t header_bits = 0; for (unsigned i = 0; i < instr->num_srcs; i++) { @@ -8402,7 +8401,6 @@ fs_nir_emit_texture(nir_to_brw_state &ntb, case nir_tex_src_backend1: assert(!got_lod && !got_bias); got_lod = true; - pack_lod_and_array_index = true; assert(instr->op == nir_texop_txl || instr->op == nir_texop_txb); srcs[TEX_LOGICAL_SRC_LOD] = retype(get_nir_src_imm(ntb, instr->src[i].src), BRW_TYPE_F); @@ -8536,8 +8534,6 @@ fs_nir_emit_texture(nir_to_brw_state &ntb, fs_inst *inst = bld.emit(opcode, dst, srcs, ARRAY_SIZE(srcs)); inst->offset = header_bits; - inst->has_packed_lod_ai_src = pack_lod_and_array_index; - const unsigned dest_size = nir_tex_instr_dest_size(instr); unsigned read_size = dest_size; if (instr->op != nir_texop_tg4 && instr->op != nir_texop_query_levels) { diff --git a/src/intel/compiler/brw_ir_fs.h b/src/intel/compiler/brw_ir_fs.h index 3bf2fcacd69..b382933f0de 100644 --- a/src/intel/compiler/brw_ir_fs.h +++ b/src/intel/compiler/brw_ir_fs.h @@ -556,11 +556,6 @@ public: bool last_rt:1; bool pi_noperspective:1; /**< Pixel interpolator noperspective flag */ bool keep_payload_trailing_zeros:1; - - /** - * Hint that this instruction has combined LOD/LOD bias with array index - */ - bool has_packed_lod_ai_src:1; /** * Whether the parameters of the SEND instructions are build with * NoMask (for A32 messages this covers only the surface handle, for diff --git a/src/intel/compiler/brw_lower_logical_sends.cpp b/src/intel/compiler/brw_lower_logical_sends.cpp index 6985f81e37b..ad351da6e0c 100644 --- a/src/intel/compiler/brw_lower_logical_sends.cpp +++ b/src/intel/compiler/brw_lower_logical_sends.cpp @@ -1048,8 +1048,7 @@ lower_sampler_logical_send(const fs_builder &bld, fs_inst *inst, if (min_lod.file != BAD_FILE && !min_lod_is_first) { /* Account for all of the missing coordinate sources */ - if (op == FS_OPCODE_TXB_LOGICAL && devinfo->ver >= 20 && - inst->has_packed_lod_ai_src) { + if (op == FS_OPCODE_TXB_LOGICAL && devinfo->ver >= 20) { /* Bspec 64985: * * For sample_b sampler message format: @@ -1254,9 +1253,7 @@ get_sampler_msg_payload_type_bit_size(const intel_device_info *devinfo, * ld2dms REMOVEDBY(GEN:HAS:1406788836) */ if (inst->opcode == SHADER_OPCODE_TXF_CMS_W_GFX12_LOGICAL || - inst->opcode == SHADER_OPCODE_TXF_MCS_LOGICAL || - (inst->opcode == FS_OPCODE_TXB_LOGICAL && !inst->has_packed_lod_ai_src && - devinfo->ver >= 20)) + inst->opcode == SHADER_OPCODE_TXF_MCS_LOGICAL) src_type_size = 2; return src_type_size * 8;