From ec06911b3d84345a7eb672f86524a9bbcad6a5ce Mon Sep 17 00:00:00 2001 From: Rohan Garg Date: Tue, 30 Apr 2024 13:31:24 +0200 Subject: [PATCH] Revert "iris: slow clear higher miplevels on single sampled 8bpp resources that have TILE64" Miptails are now disabled on Tile64 resources, so we can drop this restriction. Ref: e3a5ade9 ('intel/isl: Disable miptails to align LODs for CCS WA') This reverts commit 8670fd6ac4611ca29468830a8d59d99bbe872651. Reviewed-by: Nanley Chery Part-of: --- src/gallium/drivers/iris/iris_clear.c | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/src/gallium/drivers/iris/iris_clear.c b/src/gallium/drivers/iris/iris_clear.c index f26c8dd4a01..7810920813e 100644 --- a/src/gallium/drivers/iris/iris_clear.c +++ b/src/gallium/drivers/iris/iris_clear.c @@ -134,18 +134,6 @@ can_fast_clear_color(struct iris_context *ice, */ if (level > 0 && util_format_get_blocksizebits(p_res->format) == 8 && p_res->width0 % 64) { - assert(res->surf.samples == 1); - return false; - } - - /* TODO: Fast clearing higher miplevels on 8 bpp single sampled TILE64 - * resources for certain widths seems broken. - */ - if (level > 0 && util_format_get_blocksizebits(p_res->format) == 8 && - res->surf.tiling == ISL_TILING_64) { - assert(res->surf.samples == 1); - perf_debug(&ice->dbg, "Slow clearing higher miplevels for single sampled " - "8 bpp resource"); return false; }