diff --git a/src/intel/compiler/brw_eu_validate.c b/src/intel/compiler/brw_eu_validate.c
index aa66f4f2e29..326b431e9af 100644
--- a/src/intel/compiler/brw_eu_validate.c
+++ b/src/intel/compiler/brw_eu_validate.c
@@ -369,11 +369,13 @@ send_restrictions(const struct brw_isa_info *isa,
                inst->src[0].nr < 112,
                "send with EOT must use g112-g127");
 
-      ERROR_IF(!dst_is_null(inst) &&
-               (inst->dst.nr + brw_eu_inst_rlen(devinfo, inst->raw) > 127) &&
-               (inst->src[0].nr + brw_eu_inst_mlen(devinfo, inst->raw) > inst->dst.nr),
-               "r127 must not be used for return address when there is "
-               "a src and dest overlap");
+      if (devinfo->ver < 10) {
+         ERROR_IF(!dst_is_null(inst) &&
+                  (inst->dst.nr + brw_eu_inst_rlen(devinfo, inst->raw) > 127) &&
+                  (inst->src[0].nr + brw_eu_inst_mlen(devinfo, inst->raw) > inst->dst.nr),
+                  "r127 must not be used for return address when there is "
+                  "a src and dest overlap");
+      }
    }
 
    return error_msg;
diff --git a/src/intel/compiler/brw_opt_bank_conflicts.cpp b/src/intel/compiler/brw_opt_bank_conflicts.cpp
index 1a447498b8c..8817ef9c753 100644
--- a/src/intel/compiler/brw_opt_bank_conflicts.cpp
+++ b/src/intel/compiler/brw_opt_bank_conflicts.cpp
@@ -541,16 +541,19 @@ namespace {
       for (unsigned reg = 0; reg < 2; reg++)
          constrained[p.atom_of_reg(reg)] = true;
 
-      /* At Intel Broadwell PRM, vol 07, section "Instruction Set Reference",
-       * subsection "EUISA Instructions", Send Message (page 990):
+      /* Bspec says:
        *
-       * "r127 must not be used for return address when there is a src and
-       * dest overlap in send instruction."
+       *    [Pre-CNL] r127 must not be used for return address when there is a
+       *    src and dest overlap in send instruction.
+       *
+       * The Intel Broadwell PRM, vol 07, section "Instruction Set Reference",
+       * subsection "EUISA Instructions", Send Message (page 990) contains the
+       * same text.
        *
        * Register allocation ensures that, so don't move 127 around to avoid
-       * breaking that property.
+       * breaking that property. The workaround will only be applied to Gfx9.
        */
-      constrained[p.atom_of_reg(127)] = true;
+      constrained[p.atom_of_reg(127)] = v->devinfo->ver < 10;
 
       foreach_block_and_inst(block, brw_inst, inst, v->cfg) {
          /* Assume that anything referenced via fixed GRFs is baked into the
diff --git a/src/intel/compiler/brw_reg_allocate.cpp b/src/intel/compiler/brw_reg_allocate.cpp
index fc326489a28..a199d680356 100644
--- a/src/intel/compiler/brw_reg_allocate.cpp
+++ b/src/intel/compiler/brw_reg_allocate.cpp
@@ -556,11 +556,14 @@ brw_reg_alloc::setup_inst_interference(const brw_inst *inst)
    }
 
    if (grf127_send_hack_node >= 0) {
-      /* At Intel Broadwell PRM, vol 07, section "Instruction Set Reference",
-       * subsection "EUISA Instructions", Send Message (page 990):
+      /* Bspec says:
        *
-       * "r127 must not be used for return address when there is a src and
-       * dest overlap in send instruction."
+       *    [Pre-CNL] r127 must not be used for return address when there is a
+       *    src and dest overlap in send instruction.
+       *
+       * The Intel Broadwell PRM, vol 07, section "Instruction Set Reference",
+       * subsection "EUISA Instructions", Send Message (page 990) contains the
+       * same text.
        *
        * We are avoiding using grf127 as part of the destination of send
        * messages adding a node interference to the grf127_send_hack_node.
@@ -634,8 +637,21 @@ brw_reg_alloc::build_interference_graph(bool allow_spilling)
    first_payload_node = node_count;
    node_count += payload_node_count;
 
-   grf127_send_hack_node = node_count;
-   node_count++;
+   /* Bspec says:
+    *
+    *    [Pre-CNL] r127 must not be used for return address when there is a
+    *    src and dest overlap in send instruction.
+    *
+    * The Intel Broadwell PRM, vol 07, section "Instruction Set Reference",
+    * subsection "EUISA Instructions", Send Message (page 990) contains the
+    * same text.
+    *
+    * The workaround will only be applied to Gfx9.
+    */
+   if (devinfo->ver < 10)
+      grf127_send_hack_node = node_count++;
+   else
+      grf127_send_hack_node = -1;
 
    first_vgrf_node = node_count;
    node_count += fs->alloc.count;