intel/isl: Allow Ys tiling
Ys & Yf are both implemented in ISL now, we still have some Yf issues to investigate. Instead of disabling them in ISL, we disable them in the two drivers. Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Nanley Chery <nanley.g.chery@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23620>
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@@ -225,13 +225,15 @@ isl_gfx6_filter_tiling(const struct isl_device *dev,
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ISL_TILING_Y0_BIT;
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}
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/* And... clear the Yf and Ys bits anyway because Anvil doesn't support
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* them yet.
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/* TODO: Investigate Yf failures (~5000 VK CTS failures at the time of this
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* writing).
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*/
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*flags &= ~ISL_TILING_SKL_Yf_BIT; /* FINISHME[SKL]: Support Yf */
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*flags &= ~ISL_TILING_SKL_Ys_BIT; /* FINISHME[SKL]: Support Ys */
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*flags &= ~ISL_TILING_ICL_Yf_BIT; /* FINISHME[ICL]: Support Yf */
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*flags &= ~ISL_TILING_ICL_Ys_BIT; /* FINISHME[ICL]: Support Ys */
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if (isl_format_is_compressed(info->format) ||
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info->samples > 1 ||
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info->dim == ISL_SURF_DIM_3D) {
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*flags &= ~ISL_TILING_SKL_Yf_BIT; /* FINISHME[SKL]: Support Yf */
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*flags &= ~ISL_TILING_ICL_Yf_BIT; /* FINISHME[ICL]: Support Yf */
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}
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if (isl_surf_usage_is_depth(info->usage)) {
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/* Depth requires Y. */
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@@ -309,9 +311,6 @@ isl_gfx6_filter_tiling(const struct isl_device *dev,
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*flags &= (ISL_TILING_LINEAR_BIT | ISL_TILING_X_BIT |
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ISL_TILING_Y0_BIT);
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} else if (ISL_GFX_VER(dev) >= 9) {
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/* Note we let Yf even though it was cleared above. This is just for
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* completeness.
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*/
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*flags &= (ISL_TILING_LINEAR_BIT | ISL_TILING_X_BIT |
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ISL_TILING_Y0_BIT |
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ISL_TILING_SKL_Yf_BIT | ISL_TILING_ICL_Yf_BIT);
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@@ -307,6 +307,9 @@ choose_isl_tiling_flags(const struct intel_device_info *devinfo,
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flags &= legacy_mask;
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}
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/* We don't support Yf or Ys tiling yet */
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flags &= ~ISL_TILING_STD_Y_MASK;
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assert(flags);
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return flags;
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