From e87881f6168f6af10a6d29fd0703bf02e007a095 Mon Sep 17 00:00:00 2001 From: Ian Romanick Date: Fri, 26 Jan 2024 12:25:41 -0800 Subject: [PATCH] intel/brw: Avoid a silly add with zero in assign_curb_setup No shader-db changes. fossil-db: DG2 Totals: Instrs: 161008251 -> 161004452 (-0.00%) Cycles: 13894249509 -> 13893050101 (-0.01%); split: -0.01%, +0.00% Totals from 3804 (0.58% of 652145) affected shaders: Instrs: 2232984 -> 2229185 (-0.17%) Cycles: 7124966553 -> 7123767145 (-0.02%); split: -0.02%, +0.00% No fossil-db changes on any other platform. Reviewed-by: Lionel Landwerlin Part-of: --- src/intel/compiler/brw_fs.cpp | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index d8174ca7ed7..95c937a8f3b 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -1270,8 +1270,17 @@ fs_visitor::assign_curb_setup() assert(num_regs > 0); num_regs = 1 << util_logbase2(num_regs); - fs_reg addr = ubld.vgrf(BRW_REGISTER_TYPE_UD); - ubld.ADD(addr, base_addr, brw_imm_ud(i * REG_SIZE)); + fs_reg addr; + + /* This pass occurs after all of the optimization passes, so don't + * emit an 'ADD addr, base_addr, 0' instruction. + */ + if (i != 0) { + addr = ubld.vgrf(BRW_REGISTER_TYPE_UD); + ubld.ADD(addr, base_addr, brw_imm_ud(i * REG_SIZE)); + } else { + addr = base_addr; + } fs_reg srcs[4] = { brw_imm_ud(0), /* desc */