diff --git a/src/gallium/drivers/zink/zink_context.c b/src/gallium/drivers/zink/zink_context.c index aac8d7a4cad..6001264341b 100644 --- a/src/gallium/drivers/zink/zink_context.c +++ b/src/gallium/drivers/zink/zink_context.c @@ -1362,6 +1362,7 @@ zink_set_stencil_ref(struct pipe_context *pctx, { struct zink_context *ctx = zink_context(pctx); ctx->stencil_ref = ref; + ctx->dsa_state_changed |= !!ctx->dsa_state; } static void @@ -1802,6 +1803,7 @@ flush_batch(struct zink_context *ctx, bool sync) ctx->vp_state_changed = true; ctx->scissor_changed = true; ctx->rast_state_changed = true; + ctx->dsa_state_changed = true; } } diff --git a/src/gallium/drivers/zink/zink_context.h b/src/gallium/drivers/zink/zink_context.h index cc2296e0e73..1d89c4e176d 100644 --- a/src/gallium/drivers/zink/zink_context.h +++ b/src/gallium/drivers/zink/zink_context.h @@ -167,6 +167,7 @@ struct zink_context { struct zink_rasterizer_state *rast_state; struct zink_depth_stencil_alpha_state *dsa_state; bool rast_state_changed : 1; + bool dsa_state_changed : 1; struct hash_table desc_set_layouts[ZINK_DESCRIPTOR_TYPES]; bool pipeline_changed[2]; //gfx, compute diff --git a/src/gallium/drivers/zink/zink_draw.c b/src/gallium/drivers/zink/zink_draw.c index 614b112748e..5a6fcfc0937 100644 --- a/src/gallium/drivers/zink/zink_draw.c +++ b/src/gallium/drivers/zink/zink_draw.c @@ -583,63 +583,60 @@ zink_draw_vbo(struct pipe_context *pctx, debug_printf("BUG: wide lines not supported, needs fallback!"); } - if (dsa_state->base.stencil[0].enabled) { - if (dsa_state->base.stencil[1].enabled) { - vkCmdSetStencilReference(batch->state->cmdbuf, VK_STENCIL_FACE_FRONT_BIT, - ctx->stencil_ref.ref_value[0]); - vkCmdSetStencilReference(batch->state->cmdbuf, VK_STENCIL_FACE_BACK_BIT, - ctx->stencil_ref.ref_value[1]); - } else - vkCmdSetStencilReference(batch->state->cmdbuf, - VK_STENCIL_FACE_FRONT_AND_BACK, - ctx->stencil_ref.ref_value[0]); - } - - if (screen->info.have_EXT_extended_dynamic_state) { - screen->vk.CmdSetDepthBoundsTestEnableEXT(batch->state->cmdbuf, dsa_state->hw_state.depth_bounds_test); - if (dsa_state->hw_state.depth_bounds_test) - vkCmdSetDepthBounds(batch->state->cmdbuf, - dsa_state->hw_state.min_depth_bounds, - dsa_state->hw_state.max_depth_bounds); - screen->vk.CmdSetDepthTestEnableEXT(batch->state->cmdbuf, dsa_state->hw_state.depth_test); - if (dsa_state->hw_state.depth_test) - screen->vk.CmdSetDepthCompareOpEXT(batch->state->cmdbuf, dsa_state->hw_state.depth_compare_op); - screen->vk.CmdSetDepthWriteEnableEXT(batch->state->cmdbuf, dsa_state->hw_state.depth_write); - screen->vk.CmdSetStencilTestEnableEXT(batch->state->cmdbuf, dsa_state->hw_state.stencil_test); - if (dsa_state->hw_state.stencil_test) { - screen->vk.CmdSetStencilOpEXT(batch->state->cmdbuf, VK_STENCIL_FACE_FRONT_BIT, - dsa_state->hw_state.stencil_front.failOp, - dsa_state->hw_state.stencil_front.passOp, - dsa_state->hw_state.stencil_front.depthFailOp, - dsa_state->hw_state.stencil_front.compareOp); - screen->vk.CmdSetStencilOpEXT(batch->state->cmdbuf, VK_STENCIL_FACE_BACK_BIT, - dsa_state->hw_state.stencil_back.failOp, - dsa_state->hw_state.stencil_back.passOp, - dsa_state->hw_state.stencil_back.depthFailOp, - dsa_state->hw_state.stencil_back.compareOp); - } + if (pipeline_changed || ctx->dsa_state_changed) { if (dsa_state->base.stencil[0].enabled) { if (dsa_state->base.stencil[1].enabled) { - vkCmdSetStencilWriteMask(batch->state->cmdbuf, VK_STENCIL_FACE_FRONT_BIT, dsa_state->hw_state.stencil_front.writeMask); - vkCmdSetStencilWriteMask(batch->state->cmdbuf, VK_STENCIL_FACE_BACK_BIT, dsa_state->hw_state.stencil_back.writeMask); - vkCmdSetStencilCompareMask(batch->state->cmdbuf, VK_STENCIL_FACE_FRONT_BIT, dsa_state->hw_state.stencil_front.compareMask); - vkCmdSetStencilCompareMask(batch->state->cmdbuf, VK_STENCIL_FACE_BACK_BIT, dsa_state->hw_state.stencil_back.compareMask); - } else { - vkCmdSetStencilWriteMask(batch->state->cmdbuf, VK_STENCIL_FACE_FRONT_AND_BACK, dsa_state->hw_state.stencil_front.writeMask); - vkCmdSetStencilCompareMask(batch->state->cmdbuf, VK_STENCIL_FACE_FRONT_AND_BACK, dsa_state->hw_state.stencil_front.compareMask); + vkCmdSetStencilReference(batch->state->cmdbuf, VK_STENCIL_FACE_FRONT_BIT, + ctx->stencil_ref.ref_value[0]); + vkCmdSetStencilReference(batch->state->cmdbuf, VK_STENCIL_FACE_BACK_BIT, + ctx->stencil_ref.ref_value[1]); + } else + vkCmdSetStencilReference(batch->state->cmdbuf, + VK_STENCIL_FACE_FRONT_AND_BACK, + ctx->stencil_ref.ref_value[0]); + } + + if (screen->info.have_EXT_extended_dynamic_state) { + screen->vk.CmdSetDepthBoundsTestEnableEXT(batch->state->cmdbuf, dsa_state->hw_state.depth_bounds_test); + if (dsa_state->hw_state.depth_bounds_test) + vkCmdSetDepthBounds(batch->state->cmdbuf, + dsa_state->hw_state.min_depth_bounds, + dsa_state->hw_state.max_depth_bounds); + screen->vk.CmdSetDepthTestEnableEXT(batch->state->cmdbuf, dsa_state->hw_state.depth_test); + if (dsa_state->hw_state.depth_test) + screen->vk.CmdSetDepthCompareOpEXT(batch->state->cmdbuf, dsa_state->hw_state.depth_compare_op); + screen->vk.CmdSetDepthWriteEnableEXT(batch->state->cmdbuf, dsa_state->hw_state.depth_write); + screen->vk.CmdSetStencilTestEnableEXT(batch->state->cmdbuf, dsa_state->hw_state.stencil_test); + if (dsa_state->hw_state.stencil_test) { + screen->vk.CmdSetStencilOpEXT(batch->state->cmdbuf, VK_STENCIL_FACE_FRONT_BIT, + dsa_state->hw_state.stencil_front.failOp, + dsa_state->hw_state.stencil_front.passOp, + dsa_state->hw_state.stencil_front.depthFailOp, + dsa_state->hw_state.stencil_front.compareOp); + screen->vk.CmdSetStencilOpEXT(batch->state->cmdbuf, VK_STENCIL_FACE_BACK_BIT, + dsa_state->hw_state.stencil_back.failOp, + dsa_state->hw_state.stencil_back.passOp, + dsa_state->hw_state.stencil_back.depthFailOp, + dsa_state->hw_state.stencil_back.compareOp); + } + if (dsa_state->base.stencil[0].enabled) { + if (dsa_state->base.stencil[1].enabled) { + vkCmdSetStencilWriteMask(batch->state->cmdbuf, VK_STENCIL_FACE_FRONT_BIT, dsa_state->hw_state.stencil_front.writeMask); + vkCmdSetStencilWriteMask(batch->state->cmdbuf, VK_STENCIL_FACE_BACK_BIT, dsa_state->hw_state.stencil_back.writeMask); + vkCmdSetStencilCompareMask(batch->state->cmdbuf, VK_STENCIL_FACE_FRONT_BIT, dsa_state->hw_state.stencil_front.compareMask); + vkCmdSetStencilCompareMask(batch->state->cmdbuf, VK_STENCIL_FACE_BACK_BIT, dsa_state->hw_state.stencil_back.compareMask); + } else { + vkCmdSetStencilWriteMask(batch->state->cmdbuf, VK_STENCIL_FACE_FRONT_AND_BACK, dsa_state->hw_state.stencil_front.writeMask); + vkCmdSetStencilCompareMask(batch->state->cmdbuf, VK_STENCIL_FACE_FRONT_AND_BACK, dsa_state->hw_state.stencil_front.compareMask); + } } } - screen->vk.CmdSetFrontFaceEXT(batch->state->cmdbuf, ctx->gfx_pipeline_state.front_face); - - if (ctx->sample_locations_changed) { - VkSampleLocationsInfoEXT loc; - zink_init_vk_sample_locations(ctx, &loc); - screen->vk.CmdSetSampleLocationsEXT(batch->state->cmdbuf, &loc); - } - ctx->sample_locations_changed = false; + ctx->dsa_state_changed = false; } if (pipeline_changed || ctx->rast_state_changed) { + if (screen->info.have_EXT_extended_dynamic_state) + screen->vk.CmdSetFrontFaceEXT(batch->state->cmdbuf, ctx->gfx_pipeline_state.front_face); if (depth_bias) vkCmdSetDepthBias(batch->state->cmdbuf, rast_state->offset_units, rast_state->offset_clamp, rast_state->offset_scale); else @@ -647,6 +644,13 @@ zink_draw_vbo(struct pipe_context *pctx, ctx->rast_state_changed = false; } + if (ctx->sample_locations_changed) { + VkSampleLocationsInfoEXT loc; + zink_init_vk_sample_locations(ctx, &loc); + screen->vk.CmdSetSampleLocationsEXT(batch->state->cmdbuf, &loc); + } + ctx->sample_locations_changed = false; + if (ctx->gfx_pipeline_state.blend_state->need_blend_constants) vkCmdSetBlendConstants(batch->state->cmdbuf, ctx->blend_constants); diff --git a/src/gallium/drivers/zink/zink_state.c b/src/gallium/drivers/zink/zink_state.c index 48e9a736548..135203e0184 100644 --- a/src/gallium/drivers/zink/zink_state.c +++ b/src/gallium/drivers/zink/zink_state.c @@ -397,6 +397,7 @@ zink_bind_depth_stencil_alpha_state(struct pipe_context *pctx, void *cso) if (state->depth_stencil_alpha_state != &ctx->dsa_state->hw_state) { state->depth_stencil_alpha_state = &ctx->dsa_state->hw_state; state->dirty |= !zink_screen(pctx->screen)->info.have_EXT_extended_dynamic_state; + ctx->dsa_state_changed = true; } } if (prev_zwrite != (ctx->dsa_state ? ctx->dsa_state->hw_state.depth_write : false)) {