From e5ed6f64d9ea2715265d14eb40fac62cd38d507b Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Mon, 20 Jan 2025 01:29:41 -0800 Subject: [PATCH] brw: Stop checking inst->is_send_from_grf() for g127 register hack Every case but SHADER_OPCODE_SEND and SHADER_OPCODE_BARRIER will be lowered to SEND before register allocation happens. And the barrier send has a null destination, so the restriction doesn't apply. Note that this hack is for Gfx9 only, so we don't need to worry about Xe3's SHADER_OPCODE_SEND_GATHER feature. Reviewed-by: Lionel Landwerlin Reviewed-by: Caio Oliveira Part-of: --- src/intel/compiler/brw_reg_allocate.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/intel/compiler/brw_reg_allocate.cpp b/src/intel/compiler/brw_reg_allocate.cpp index 6d73a3d6ee8..dddfee2d5ec 100644 --- a/src/intel/compiler/brw_reg_allocate.cpp +++ b/src/intel/compiler/brw_reg_allocate.cpp @@ -597,8 +597,8 @@ brw_reg_alloc::setup_inst_interference(const brw_inst *inst) * We don't apply it to SIMD16 instructions because previous code avoids * any register overlap between sources and destination. */ - if (inst->exec_size < 16 && inst->is_send_from_grf() && - inst->dst.file == VGRF) + if (inst->opcode == SHADER_OPCODE_SEND && inst->dst.file == VGRF && + inst->exec_size < 16) ra_add_node_interference(g, first_vgrf_node + inst->dst.nr, grf127_send_hack_node); }